X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fcpsw.h;h=786f8b385b75da4f74c89f110e04fb6faa0f4e73;hb=0154e6de37e8bbaac837939391f6d4a8f0b3fd18;hp=743cb96e7e9e1502dfb807b1f8d9110b42605c98;hpb=326ea986ac150acdc7656d57fca647db80b50158;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/cpsw.h b/include/cpsw.h index 743cb96..786f8b3 100644 --- a/include/cpsw.h +++ b/include/cpsw.h @@ -16,11 +16,32 @@ #ifndef _CPSW_H_ #define _CPSW_H_ +#include + +/* reg offset */ +#define CPSW_HOST_PORT_OFFSET 0x108 +#define CPSW_SLAVE0_OFFSET 0x208 +#define CPSW_SLAVE1_OFFSET 0x308 +#define CPSW_SLAVE_SIZE 0x100 +#define CPSW_CPDMA_OFFSET 0x800 +#define CPSW_HW_STATS 0x900 +#define CPSW_STATERAM_OFFSET 0xa00 +#define CPSW_CPTS_OFFSET 0xc00 +#define CPSW_ALE_OFFSET 0xd00 +#define CPSW_SLIVER0_OFFSET 0xd80 +#define CPSW_SLIVER1_OFFSET 0xdc0 +#define CPSW_BD_OFFSET 0x2000 +#define CPSW_MDIO_DIV 0xff + +#define AM335X_GMII_SEL_OFFSET 0x630 + struct cpsw_slave_data { u32 slave_reg_ofs; u32 sliver_reg_ofs; - int phy_id; + int phy_addr; int phy_if; + ofnode phy_of_handle; + int max_speed; }; enum { @@ -31,6 +52,8 @@ enum { struct cpsw_platform_data { u32 mdio_base; u32 cpsw_base; + u32 mac_id; + u32 gmii_sel; int mdio_div; int channels; /* number of cpdma channels (symmetric) */ u32 cpdma_reg_ofs; /* cpdma register offset */ @@ -44,9 +67,19 @@ struct cpsw_platform_data { struct cpsw_slave_data *slave_data; void (*control)(int enabled); u32 host_port_num; + u32 active_slave; + bool rmii_clock_external; u8 version; + const char *phy_sel_compat; + u32 syscon_addr; + const char *macid_sel_compat; }; int cpsw_register(struct cpsw_platform_data *data); +int ti_cm_get_macid_addr(struct udevice *dev, int slave, + struct cpsw_platform_data *data); +void ti_cm_get_macid(struct udevice *dev, struct cpsw_platform_data *data, + u8 *mac_addr); +int cpsw_get_slave_phy_addr(struct udevice *dev, int slave); #endif /* _CPSW_H_ */