X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fzipitz2.h;h=8b7e05b9e51fe7597ec7f1ce9af891d0f1f6b538;hb=3d6ba91e793808d1612152e9f9b8c51b3ca6c926;hp=615d5c1f75cf9076c87fb1e2ee9c83e0785d383e;hpb=d75c2a3d7f34ff1eb9920ad72483cff7cb6d358f;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 615d5c1..8b7e05b 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -25,13 +25,13 @@ /* * High Level Board Configuration Options */ -#define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */ +#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ #define CONFIG_ZIPITZ2 1 /* Zipit Z2 board */ #define CONFIG_SYS_TEXT_BASE 0x0 -#undef BOARD_LATE_INIT -#undef CONFIG_USE_IRQ +#undef CONFIG_BOARD_LATE_INIT #undef CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_PREBOOT /* * Environment settings @@ -45,7 +45,8 @@ #define CONFIG_ARCH_CPU_INIT #define CONFIG_BOOTCOMMAND \ - "if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then " \ + "if mmc rescan && ext2load mmc 0 0xa0000000 boot/uboot.script ;"\ + "then " \ "source 0xa0000000; " \ "else " \ "bootm 0x60000; " \ @@ -66,7 +67,6 @@ #define CONFIG_PXA_SERIAL #define CONFIG_STUART 1 #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* * Bootloader Components Configuration @@ -74,6 +74,7 @@ #include #undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS #define CONFIG_CMD_ENV #undef CONFIG_CMD_IMLS #define CONFIG_CMD_MMC @@ -84,7 +85,8 @@ */ #ifdef CONFIG_CMD_MMC #define CONFIG_MMC -#define CONFIG_PXA_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_PXA_MMC_GENERIC #define CONFIG_SYS_MMC_BASE 0xF0000000 #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 @@ -130,7 +132,6 @@ unsigned char zipitz2_spi_read(void); * HUSH Shell Configuration */ #define CONFIG_SYS_HUSH_PARSER 1 -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_LONGHELP /* undef to save memory */ #ifdef CONFIG_SYS_HUSH_PARSER @@ -152,13 +153,10 @@ unsigned char zipitz2_spi_read(void); #define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */ /* - * Stack sizes + * SRAM Map */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif +#define PHYS_SRAM 0x5c000000 /* SRAM Bank #1 */ +#define PHYS_SRAM_SIZE 0x00040000 /* 256k */ /* * DRAM Map @@ -176,7 +174,7 @@ unsigned char zipitz2_spi_read(void); #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1 + 2048) +#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SRAM + 2048) /* * NOR FLASH