X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fyosemite.h;h=a8eeff989c347fe5972350af349a3580755e89a4;hb=8d79953d03e6c5b24215609997dafe4daa623cd6;hp=b59f75b9d0f9dbb392ca81f4ad97826b32c7a116;hpb=72c5e39c835f8257f8833411773902ce0e1ccbc3;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h
index b59f75b..a8eeff9 100644
--- a/include/configs/yosemite.h
+++ b/include/configs/yosemite.h
@@ -32,13 +32,13 @@
  *----------------------------------------------------------------------*/
 /* This config file is used for Yosemite (440EP) and Yellowstone (440GR)*/
 #ifndef CONFIG_YELLOWSTONE
-#define CONFIG_YOSEMITE		1	/* Board is Yosemite		*/
 #define CONFIG_440EP		1	/* Specific PPC440EP support	*/
 #define CONFIG_HOSTNAME		yosemite
 #else
 #define CONFIG_440GR		1	/* Specific PPC440GR support	*/
 #define CONFIG_HOSTNAME		yellowstone
 #endif
+#define CONFIG_440		1	/* ... PPC440 family		*/
 #define CONFIG_4xx		1	/* ... PPC4xx family		*/
 #define CONFIG_SYS_CLK_FREQ	66666666    /* external freq to pll	*/
 
@@ -123,7 +123,7 @@
 #define CFG_FLASH_EMPTY_INFO		/* print 'E' for empty sector on flinfo */
 
 #ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE	0x20000 	/* size of one complete sector	*/
+#define CFG_ENV_SECT_SIZE	0x20000	/* size of one complete sector		*/
 #define CFG_ENV_ADDR		(CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
 #define	CFG_ENV_SIZE		0x2000	/* Total Size of Environment Sector	*/
 
@@ -160,6 +160,14 @@
 #define CFG_ENV_OFFSET		0x0
 #endif /* CFG_ENV_IS_IN_EEPROM */
 
+/* I2C SYSMON (LM75, AD7414 is almost compatible)			*/
+#define CONFIG_DTT_LM75		1		/* ON Semi's LM75	*/
+#define CONFIG_DTT_AD7414	1		/* use AD7414		*/
+#define CONFIG_DTT_SENSORS	{0}		/* Sensor addresses	*/
+#define CFG_DTT_MAX_TEMP	70
+#define CFG_DTT_LOW_TEMP	-30
+#define CFG_DTT_HYSTERESIS	3
+
 #define CONFIG_PREBOOT	"echo;"	\
 	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
 	"echo"
@@ -235,6 +243,7 @@
 /* USB */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_USB_STORAGE
+#define CFG_OHCI_BE_CONTROLLER
 
 #undef CFG_USB_OHCI_BOARD_INIT
 #define CFG_USB_OHCI_CPU_INIT	1
@@ -245,11 +254,7 @@
 /* Comment this out to enable USB 1.1 device */
 #define USB_2_0_DEVICE
 
-#define CMD_USB			(CFG_CMD_USB | CFG_CMD_FAT | CFG_CMD_EXT2)
-
 #define CONFIG_SUPPORT_VFAT
-#else
-#define CMD_USB			0	/* no USB on 440GR		*/
 #endif /* CONFIG_440EP */
 
 #ifdef DEBUG
@@ -258,32 +263,50 @@
 #define CONFIG_HW_WATCHDOG			/* watchdog */
 #endif
 
-#define CONFIG_COMMANDS	       (CONFIG_CMD_DFL	| \
-				CFG_CMD_ASKENV	| \
-				CFG_CMD_DHCP	| \
-				CFG_CMD_DIAG	| \
-				CFG_CMD_ELF	| \
-				CFG_CMD_EEPROM	| \
-				CFG_CMD_I2C	| \
-				CFG_CMD_IRQ	| \
-				CFG_CMD_MII	| \
-				CFG_CMD_NET	| \
-				CFG_CMD_NFS	| \
-				CFG_CMD_PCI	| \
-				CFG_CMD_PING	| \
-				CFG_CMD_REGINFO	| \
-				CFG_CMD_SDRAM	| \
-				CMD_USB)
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+
+#ifdef CONFIG_440EP
+    #define CONFIG_CMD_USB
+    #define CONFIG_CMD_FAT
+    #define CONFIG_CMD_EXT2
+#endif
+
 
 /*
  * Miscellaneous configurable options
  */
 #define CFG_LONGHELP			/* undef to save memory		*/
 #define CFG_PROMPT	        "=> "	/* Monitor Command Prompt	*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CFG_CBSIZE	        1024	/* Console I/O Buffer Size	*/
 #else
 #define CFG_CBSIZE	        256	/* Console I/O Buffer Size	*/
@@ -318,7 +341,6 @@
 #define CFG_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
 
 /* Board-specific PCI */
-#define CFG_PCI_PRE_INIT                /* enable board pci_pre_init()  */
 #define CFG_PCI_TARGET_INIT
 #define CFG_PCI_MASTER_INIT
 
@@ -346,14 +368,7 @@
 #define CFG_EBC_PB2AP		0x04814500
 #define CFG_EBC_PB2CR		(CFG_CPLD | 0x18000)
 
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CFG_DCACHE_SIZE		(32<<10) /* For AMCC 440 CPUs			*/
-#define CFG_CACHELINE_SIZE	32	/* ...			*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
+#define CFG_BCSR5_PCI66EN	0x80
 
 /*
  * Internal Definitions
@@ -363,7 +378,7 @@
 #define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
 #define BOOTFLAG_WARM	0x02		/* Software reboot			*/
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
 #endif