X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fxsengine.h;h=4d1bdd7b143883e126f8b58be31c2d964517802a;hb=42fd5f87b1613d3039f57e93c16f760a768d3e84;hp=87d2c942d7607053339a6dcf28c753be3bd08f8a;hpb=ca0e774894ceceeffe5134f69c0f4e1f789407a2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h
index 87d2c94..4d1bdd7 100644
--- a/include/configs/xsengine.h
+++ b/include/configs/xsengine.h
@@ -28,17 +28,12 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/*
- * If we are developing, we might want to start armboot from ram
- * so we MUST NOT initialize critical regs like mem-timing ...
- */
-#define CONFIG_INIT_CRITICAL				/* undef for developing */
-
 /* High Level Configuration Options */
 #define CONFIG_PXA250			1		/* This is an PXA250 CPU    */
 #define CONFIG_XSENGINE			1
 #define CONFIG_MMC			1
-#define BOARD_POST_INIT			1
+#define CONFIG_DOS_PARTITION		1
+#define BOARD_LATE_INIT			1
 #undef  CONFIG_USE_IRQ					/* we don't need IRQ/FIQ stuff */
 #define CFG_HZ				3686400		/* incrementer freq: 3.6864 MHz */
 
@@ -65,9 +60,23 @@
 #define PHYS_FLASH_2			0x00000000	/* Flash Bank #2 */
 #define PHYS_FLASH_SECT_SIZE		0x00020000	/* 127 KB sectors */
 #define CFG_FLASH_BASE			PHYS_FLASH_1
-#define CFG_JFFS2_NUM_BANKS		1
-#define CFG_JFFS2_FIRST_BANK		0
-#define CFG_JFFS_CUSTOM_PART		1
+
+/*
+ * JFFS2 partitions
+ */
+/* No command line, one static partition, whole device */
+#undef CONFIG_JFFS2_CMDLINE
+#define CONFIG_JFFS2_DEV		"nor0"
+#define CONFIG_JFFS2_PART_SIZE		0xFFFFFFFF
+#define CONFIG_JFFS2_PART_OFFSET	0x00000000
+
+/* mtdparts command line support */
+/* Note: fake mtd_id used, no linux mtd map file */
+/*
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT		"nor0=xsengine-0"
+#define MTDPARTS_DEFAULT	"mtdparts=xsengine-0:256k(uboot),1m(kernel1),8m(kernel2)"
+*/
 
 /* Environment settings */
 #define CONFIG_ENV_OVERWRITE
@@ -77,8 +86,8 @@
 #define CFG_ENV_SIZE                    0x4000				/* 16kB Total Size of Environment Sector */
 
 /* timeout values are in ticks */
-#define CFG_FLASH_ERASE_TOUT		(75*CFG_HZ) 	/* Timeout for Flash Erase */
-#define CFG_FLASH_WRITE_TOUT		(50*CFG_HZ) 	/* Timeout for Flash Write */
+#define CFG_FLASH_ERASE_TOUT		(75*CFG_HZ)	/* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT		(50*CFG_HZ)	/* Timeout for Flash Write */
 
 /* Size of malloc() pool */
 #define CFG_MALLOC_LEN			(CFG_ENV_SIZE + 256*1024)
@@ -87,17 +96,33 @@
 /* Hardware drivers */
 #define CONFIG_DRIVER_SMC91111
 #define CONFIG_SMC91111_BASE		0x04000300
-#define CONFIG_SMC_USE_32_BIT 		1
+#define CONFIG_SMC_USE_32_BIT		1
 
 /* select serial console configuration */
 #define CONFIG_FFUART			1
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_BAUDRATE			115200
-#define CONFIG_COMMANDS			(CONFIG_CMD_DFL | CFG_CMD_MMC | CFG_CMD_FAT | CFG_CMD_PING | CFG_CMD_JFFS2)
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_JFFS2
+
 
 #define CONFIG_BOOTDELAY		3
 #define CONFIG_ETHADDR			FF:FF:FF:FF:FF:FF
@@ -113,15 +138,15 @@
 #define CFG_LONGHELP								/* undef to save memory	*/
 #define CFG_PROMPT			"XS-Engine u-boot> "			/* Monitor Command Prompt */
 #define CFG_CBSIZE			256					/* Console I/O Buffer Size */
-#define CFG_PBSIZE			(CFG_CBSIZE+sizeof(CFG_PROMPT)+16) 	/* Print Buffer Size */
+#define CFG_PBSIZE			(CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print Buffer Size */
 #define CFG_MAXARGS			16					/* max number of command args */
 #define CFG_BARGSIZE			CFG_CBSIZE				/* Boot Argument Buffer Size */
 #define CFG_MEMTEST_START		0xA0400000				/* memtest works on     */
 #define CFG_MEMTEST_END			0xA0800000				/* 4 ... 8 MB in DRAM   */
-#undef  CFG_CLKS_IN_HZ          						/* everything, incl board info, in Hz */
+#undef  CFG_CLKS_IN_HZ								/* everything, incl board info, in Hz */
 #define CFG_BAUDRATE_TABLE		{ 9600, 19200, 38400, 57600, 115200 }	/* valid baudrates */
 #define CFG_MMC_BASE			0xF0000000
-#define CFG_LOAD_ADDR           	0xA0000000				/* load kernel to this address   */
+#define CFG_LOAD_ADDR			0xA0000000				/* load kernel to this address   */
 
 /* Stack sizes - The stack sizes are set up in start.S using the settings below */
 #define CONFIG_STACKSIZE		(128*1024)	/* regular stack */
@@ -143,7 +168,7 @@
 /* GP direction register */
 #define CFG_GPDR0_VAL			0x0000A000	/* CS1, PROG(FPGA) */
 #define CFG_GPDR1_VAL			0x00022A80	/* nPWE, FFUART + BTUART pins */
-#define CFG_GPDR2_VAL			0x0000C000  	/* CS2, CS3 */
+#define CFG_GPDR2_VAL			0x0000C000	/* CS2, CS3 */
 
 /* GP rising edge detect register */
 #define CFG_GRER0_VAL			0x00000000
@@ -160,7 +185,7 @@
 #define CFG_GAFR0_U_VAL			0x00000010	/* RDY */
 #define CFG_GAFR1_L_VAL			0x09988050	/* FFUART + BTUART pins */
 #define CFG_GAFR1_U_VAL			0x00000008	/* nPWE */
-#define CFG_GAFR2_L_VAL			0xA0000000  	/* CS2, CS3 */
+#define CFG_GAFR2_L_VAL			0xA0000000	/* CS2, CS3 */
 #define CFG_GAFR2_U_VAL			0x00000000
 
 #define CFG_PSSR_VAL			0x00000020	/* Power manager sleep status */