X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fxpress.h;h=0e43b373649aaaf25209800ea3d5df1a21409f28;hb=bf2c48fa1a6e068f232d84aae43b5dad654a9017;hp=ba7fc84bf2f00b6f806221185cb30830b6c66628;hpb=c27178ba3649f539c9f1890ea147f4c5415f63b5;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/xpress.h b/include/configs/xpress.h index ba7fc84..0e43b37 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -13,28 +13,13 @@ /* SPL options */ #include "imx6_spl.h" -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (16 << 20) - -#define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -/* I2C configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */ -#define CONFIG_SYS_I2C_SPEED 100000 - /* Miscellaneous configurable options */ -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_SYS_HZ 1000 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE (128 << 20) @@ -43,32 +28,14 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - /* Environment is in stored in the eMMC boot partition */ -#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ -#define CONFIG_SYS_MMC_ENV_PART 1 /* boot parition */ -#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC2 */ /* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_FEC_MXC #define CONFIG_FEC_ENET_DEV 0 -#define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "FEC" - -#define CONFIG_IMX_THERMAL - -#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_UBOOT_SECTOR_START 0x2 #define CONFIG_UBOOT_SECTOR_COUNT 0x3fe @@ -84,8 +51,8 @@ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ - "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ - "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \