X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fxpedite550x.h;h=09480350d9cd92fe5d943741ccd53c4a8d788314;hb=adad96e60d0eb1bbc4d0b96c89decf385a426e42;hp=3c6bf5cf006e32d0c93671f5ac79025873b2a71f;hpb=553f09823cced77296825f615f00321d932bf914;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 3c6bf5c..0948035 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -2,22 +2,7 @@ * Copyright 2010 Extreme Engineering Solutions, Inc. * Copyright 2007-2008 Freescale Semiconductor, Inc. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -31,13 +16,13 @@ */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ #define CONFIG_P2020 1 #define CONFIG_XPEDITE550X 1 #define CONFIG_SYS_BOARD_NAME "XPedite5500" #define CONFIG_SYS_FORM_PMC_XMC 1 #define CONFIG_PRPMC_PCI_ALIAS "pci0" /* Processor PMC interface on pci0 */ #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#define CONFIG_DISPLAY_BOARDINFO #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xfff80000 @@ -48,6 +33,7 @@ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ #define CONFIG_PCIE1 1 /* PCIE controler 1 (PEX8112 or XMC) */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ @@ -63,11 +49,11 @@ /* * DDR config */ -#define CONFIG_FSL_DDR3 +#define CONFIG_SYS_FSL_DDR3 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#define SPD_EEPROM_ADDRESS1 0x54 +#define SPD_EEPROM_ADDRESS 0x54 #define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */ #define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 @@ -93,14 +79,8 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ENABLE_36BIT_PHYS 1 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR 0xef000000 /* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR 0xef000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* * Diagnostics @@ -141,8 +121,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \ CONFIG_SYS_NAND_BASE2} #define CONFIG_SYS_MAX_NAND_DEVICE 2 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_NAND_QUIET_TEST /* 2nd NAND flash not always populated */ #define CONFIG_NAND_FSL_ELBC /* @@ -216,8 +194,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_INIT_RAM_ADDR 0xe0000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */ @@ -227,7 +204,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); * Serial Port */ #define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) @@ -239,30 +215,19 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -/* - * Use the HUSH parser - */ -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - -/* - * Pass open firmware flat tree - */ -#define CONFIG_OF_LIBFDT 1 -#define CONFIG_OF_BOARD_SETUP 1 -#define CONFIG_OF_STDOUT_VIA_ALIAS 1 #define CONFIG_FDT_FIXUP_PCI_IRQ 1 /* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 /* I2C DS7505 temperature sensor */ #define CONFIG_DTT_LM75 @@ -340,12 +305,21 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -#define CONFIG_NET_MULTI 1 #define CONFIG_TSEC_TBI #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_ETHPRIME "eTSEC2" +/* + * In-band SGMII auto-negotiation between TBI and BCM5482S PHY fails, force + * 1000mbps SGMII link + */ +#define CONFIG_TSEC_TBICR_SETTINGS ( \ + TBICR_PHY_RESET \ + | TBICR_FULL_DUPLEX \ + | TBICR_SPEED1_SET \ + ) + #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC1" #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) @@ -379,27 +353,21 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * Command configuration. */ -#include - #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_DTT #define CONFIG_CMD_EEPROM -#define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII #define CONFIG_CMD_NAND -#define CONFIG_CMD_NET #define CONFIG_CMD_PCA953X #define CONFIG_CMD_PCA953X_INFO #define CONFIG_CMD_PCI #define CONFIG_CMD_PCI_ENUM #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB @@ -408,20 +376,16 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ #define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ #define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ #define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ #define CONFIG_PANIC_HANG /* do not reset board on panic */ #define CONFIG_PREBOOT /* enable preboot variable */ -#define CONFIG_FIT 1 -#define CONFIG_FIT_VERBOSE 1 #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ /* @@ -433,12 +397,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* - * Boot Flags - */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/* * Environment Configuration */ #define CONFIG_ENV_IS_IN_FLASH 1 @@ -460,12 +418,12 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); * f6f00000 - f7efffff Sec OS image (16MB) * f0000000 - f6efffff Sec OS Use/Filesystem (111MB) */ -#define CONFIG_UBOOT1_ENV_ADDR MK_STR(0xfff80000) -#define CONFIG_UBOOT2_ENV_ADDR MK_STR(0xf7f80000) -#define CONFIG_FDT1_ENV_ADDR MK_STR(0xfff00000) -#define CONFIG_FDT2_ENV_ADDR MK_STR(0xf7f00000) -#define CONFIG_OS1_ENV_ADDR MK_STR(0xfef00000) -#define CONFIG_OS2_ENV_ADDR MK_STR(0xf6f00000) +#define CONFIG_UBOOT1_ENV_ADDR __stringify(0xfff80000) +#define CONFIG_UBOOT2_ENV_ADDR __stringify(0xf7f80000) +#define CONFIG_FDT1_ENV_ADDR __stringify(0xfff00000) +#define CONFIG_FDT2_ENV_ADDR __stringify(0xf7f00000) +#define CONFIG_OS1_ENV_ADDR __stringify(0xfef00000) +#define CONFIG_OS2_ENV_ADDR __stringify(0xf6f00000) #define CONFIG_PROG_UBOOT1 \ "$download_cmd $loadaddr $ubootfile; " \