X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fxpedite537x.h;h=a1c5826f7badb1665f6fa902b0742b6356e0d3ab;hb=e89f8aae3d67cd3d2d04cedd9735c5e5fd32b621;hp=d6b614350064aeabfb7f730a4d3ad113419c5d16;hpb=0285100909e360474afe55f10f4b402dafa27c42;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index d6b6143..a4566b8 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -14,31 +14,17 @@ /* * High Level Configuration Options */ -#define CONFIG_BOOKE 1 /* BOOKE */ -#define CONFIG_E500 1 /* BOOKE e500 family */ -#define CONFIG_MPC8572 1 -#define CONFIG_XPEDITE5370 1 #define CONFIG_SYS_BOARD_NAME "XPedite5370" #define CONFIG_SYS_FORM_3U_VPX 1 #define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ -#define CONFIG_SYS_GENERIC_BOARD -#define CONFIG_DISPLAY_BOARDINFO -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xfff80000 -#endif - -#define CONFIG_PCI 1 /* Enable PCI/PCIE */ -#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define CONFIG_PCIE1 1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 1 /* PCIE controler 2 */ +#define CONFIG_PCIE1 1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 1 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ -#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ -#define CONFIG_FSL_ELBC 1 /* * Multicore config @@ -50,7 +36,6 @@ /* * DDR config */ -#define CONFIG_SYS_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD @@ -58,7 +43,6 @@ #define SPD_EEPROM_ADDRESS1 0x54 /* Both channels use the */ #define SPD_EEPROM_ADDRESS2 0x54 /* same SPD data */ #define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */ -#define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_DDR_ECC @@ -88,21 +72,10 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * Diagnostics */ -#define CONFIG_SYS_ALT_MEMTEST #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x20000000 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ CONFIG_SYS_POST_I2C) -#define I2C_ADDR_LIST {CONFIG_SYS_I2C_DS1621_ADDR, \ - CONFIG_SYS_I2C_DS4510_ADDR, \ - CONFIG_SYS_I2C_EEPROM_ADDR, \ - CONFIG_SYS_I2C_LM90_ADDR, \ - CONFIG_SYS_I2C_PCA953X_ADDR0, \ - CONFIG_SYS_I2C_PCA953X_ADDR1, \ - CONFIG_SYS_I2C_PCA953X_ADDR2, \ - CONFIG_SYS_I2C_PCA953X_ADDR3, \ - CONFIG_SYS_I2C_PEX8518_ADDR, \ - CONFIG_SYS_I2C_RTC_ADDR} /* The XPedite5370 can host an XMC which has an EEPROM at address 0x50 */ #define I2C_ADDR_IGNORE_LIST {0x50} @@ -131,8 +104,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \ CONFIG_SYS_NAND_BASE2} #define CONFIG_SYS_MAX_NAND_DEVICE 2 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_NAND_QUIET_TEST /* 2nd NAND flash not always populated */ #define CONFIG_NAND_FSL_ELBC /* @@ -215,8 +186,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * Serial Port */ -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) @@ -224,23 +193,10 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} -#define CONFIG_BAUDRATE 115200 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ /* - * Use the HUSH parser - */ -#define CONFIG_SYS_HUSH_PARSER - -/* - * Pass open firmware flat tree - */ -#define CONFIG_OF_LIBFDT 1 -#define CONFIG_OF_BOARD_SETUP 1 -#define CONFIG_OF_STDOUT_VIA_ALIAS 1 - -/* * I2C */ #define CONFIG_SYS_I2C @@ -257,9 +213,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_I2C_PEX8518_ADDR 0x70 /* I2C DS1631 temperature sensor */ -#define CONFIG_SYS_I2C_DS1621_ADDR 0x48 -#define CONFIG_DTT_DS1621 -#define CONFIG_DTT_SENSORS { 0 } #define CONFIG_SYS_I2C_LM90_ADDR 0x4c /* I2C EEPROM - AT24C128B */ @@ -273,10 +226,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_I2C_RTC_ADDR 0x68 #define CONFIG_SYS_M41T11_BASE_YEAR 2000 -/* GPIO/EEPROM/SRAM */ -#define CONFIG_DS4510 -#define CONFIG_SYS_I2C_DS4510_ADDR 0x51 - /* GPIO */ #define CONFIG_PCA953X #define CONFIG_SYS_I2C_PCA953X_ADDR0 0x18 @@ -349,7 +298,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); * Networking options */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ -#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ #define CONFIG_TSEC_TBI #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ @@ -380,50 +328,11 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_HAS_ETH1 /* - * Command configuration. - */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DATE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DS4510 -#define CONFIG_CMD_DS4510_INFO -#define CONFIG_CMD_DTT -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_ELF -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_I2C -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MII -#define CONFIG_CMD_NAND -#define CONFIG_CMD_NET -#define CONFIG_CMD_PCA953X -#define CONFIG_CMD_PCA953X_INFO -#define CONFIG_CMD_PCI -#define CONFIG_CMD_PCI_ENUM -#define CONFIG_CMD_PING -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_SNTP -#define CONFIG_CMD_REGINFO - -/* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ -#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */ #define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ -#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ -#define CONFIG_PANIC_HANG /* do not reset board on panic */ #define CONFIG_PREBOOT /* enable preboot variable */ -#define CONFIG_FIT 1 -#define CONFIG_FIT_VERBOSE 1 #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ /* @@ -437,7 +346,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * Environment Configuration */ -#define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */ #define CONFIG_ENV_SIZE 0x8000 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024)) @@ -585,7 +493,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); "osfile=/home/user/board.uImage\0" \ "fdtfile=/home/user/board.dtb\0" \ "ubootfile=/home/user/u-boot.bin\0" \ - "fdtaddr=c00000\0" \ + "fdtaddr=0x1e00000\0" \ "osaddr=0x1000000\0" \ "loadaddr=0x1000000\0" \ "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \