X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fxm250.h;h=a35bce3703e3b5a729626851100224847cbe65c5;hb=544aa66a6695790227613bf32bdf672143d5a1ad;hp=16af845001edf374d5eb83224ee4f9370c3247f7;hpb=f61f1e150c84f5b9347fca79a4bc5f2286c545d2;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/xm250.h b/include/configs/xm250.h
index 16af845..a35bce3 100644
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -35,6 +35,10 @@
 #define CONFIG_PXA250	       1	/* This is an PXA250 CPU	*/
 #define CONFIG_XM250	       1	/* on a MicroSys XM250 Board	*/
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
+#define	CONFIG_SYS_TEXT_BASE	0x0
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * Size of malloc() pool; this lives below the uppermost 128 KiB which are
@@ -42,12 +46,11 @@
  *
  */
 #define CONFIG_SYS_MALLOC_LEN		(256*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 
 /*
  * Hardware drivers
  */
-#define CONFIG_DRIVER_SMC91111
+#define CONFIG_SMC91111
 #define CONFIG_SMC91111_BASE		0x04000300
 #undef	CONFIG_SMC91111_EXT_PHY
 #define CONFIG_SMC_USE_32_BIT
@@ -57,6 +60,8 @@
 /*
  * I2C bus
  */
+#define CONFIG_I2C_MV			1
+#define CONFIG_MV_I2C_REG		0x40301680
 #define CONFIG_HARD_I2C			1
 #define CONFIG_SYS_I2C_SPEED			50000
 #define CONFIG_SYS_I2C_SLAVE			0xfe
@@ -74,6 +79,7 @@
 /*
  * select serial console configuration
  */
+#define CONFIG_PXA_SERIAL
 #define CONFIG_FFUART	       1       /* we use FFUART */
 
 /* allow to overwrite serial and ethaddr */
@@ -117,11 +123,9 @@
 #define CONFIG_SYS_MEMTEST_START	0xa0400000	/* memtest works on		*/
 #define CONFIG_SYS_MEMTEST_END		0xa0800000	/* 4 ... 8 MB in DRAM		*/
 
-#undef	CONFIG_SYS_CLKS_IN_HZ		/* everything, incl board info, in Hz */
-
 #define CONFIG_SYS_LOAD_ADDR		0xa3000000	/* default load address */
 
-#define CONFIG_SYS_HZ			3686400		/* incrementer freq: 3.6864 MHz */
+#define CONFIG_SYS_HZ			1000
 #define CONFIG_SYS_CPUSPEED		0x161		/* set core clock to 400/400/100 MHz */
 
 						/* valid baudrates */
@@ -134,7 +138,6 @@
 #define CONFIG_CMDLINE_TAG	 1	 /* send commandline to Kernel		*/
 #define CONFIG_SETUP_MEMORY_TAGS 1	 /* send memory definition to kernel	*/
 #define	CONFIG_INITRD_TAG	 1	 /* do not send initrd params		*/
-#undef	CONFIG_VFD			 /* do not send framebuffer setup	*/
 
 /*
  * Stack sizes
@@ -171,6 +174,9 @@
 
 #define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define	CONFIG_SYS_INIT_SP_ADDR		(GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * FLASH and environment organization
  */
@@ -316,9 +322,9 @@
  * Clocks, power control and interrupts
  */
 #define CONFIG_SYS_PSSR_VAL	    0x00000030
-#define CONFIG_SYS_CCCR_VAL	    0x00000161	/* 100 MHz memory, 400 MHz CPU, 400 Turbo  */
-#define CONFIG_SYS_CKEN_VAL	    0x000141ec	/* FFUART and STUART enabled	*/
-#define CONFIG_SYS_ICMR_VAL	    0x00000000	/* No interrupts enabled	*/
+#define CONFIG_SYS_CCCR		    0x00000161	/* 100 MHz memory, 400 MHz CPU, 400 Turbo  */
+#define CONFIG_SYS_CKEN		    0x000141ec	/* FFUART and STUART enabled	*/
+#define CONFIG_SYS_ICMR		    0x00000000	/* No interrupts enabled	*/
 
 /* FIXME
  *
@@ -337,6 +343,8 @@
 #define CONFIG_SYS_MDCNFG_VAL	    0x000009c9
 #define CONFIG_SYS_MDMRS_VAL	    0x00220022
 #define CONFIG_SYS_MDREFR_VAL	    0x000da018	/* Initial setting, individual bits set in lowlevel_init.S */
+#define	CONFIG_SYS_FLYCNFG_VAL		0x00000000
+#define	CONFIG_SYS_SXCNFG_VAL		0x00000000
 
 /*
  * PCMCIA and CF Interfaces (NOT USED, these values from lubbock init)