X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fwork_92105.h;h=7874b77f3f88b12facc043529007724eed3dc19c;hb=f9a48654ee70fbad29f487d074fd36a1548b4209;hp=65db858ffb407bdf9dde9b6a60e8577e62b6923e;hpb=a1dc980d88a5c9c2b99251c8d8299b0c8948de73;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index 65db858..7874b77 100644
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -1,10 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * WORK Microwave work_92105 board configuration file
  *
  * (C) Copyright 2014  DENX Software Engineering GmbH
  * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_WORK_92105_H__
@@ -20,26 +19,16 @@
  */
 #define CONFIG_MACH_TYPE		736
 
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_DCACHE_OFF
 #if !defined(CONFIG_SPL_BUILD)
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #endif
-#define CONFIG_BOARD_EARLY_INIT_R
-
-/* generate LPC32XX-specific SPL image */
-#define CONFIG_LPC32XX_SPL
 
 /*
  * Memory configurations
  */
-#define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_MALLOC_LEN		SZ_1M
 #define CONFIG_SYS_SDRAM_BASE		EMC_DYCS0_BASE
 #define CONFIG_SYS_SDRAM_SIZE		SZ_128M
-#define CONFIG_SYS_TEXT_BASE		0x80100000
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + SZ_32K)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - SZ_1M)
 
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_32K)
 
@@ -55,10 +44,7 @@
  * Ethernet Driver
  */
 
-#define CONFIG_PHY_SMSC
 #define CONFIG_LPC32XX_ETH
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR 0
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
 
@@ -86,16 +72,9 @@
 /*
  * U-Boot General Configurations
  */
-#define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_CBSIZE		1024
-#define CONFIG_SYS_PBSIZE		\
-	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS		16
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_CMDLINE_EDITING
-
 /*
  * NAND chip timings for FIXME: which one?
  */
@@ -119,8 +98,6 @@
 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE
 #define CONFIG_NAND_LPC32XX_MLC
 
-#define CONFIG_CMD_NAND
-
 /*
  * GPIO
  */
@@ -128,23 +105,9 @@
 #define CONFIG_LPC32XX_GPIO
 
 /*
- * SSP/SPI/DISPLAY
- */
-
-#define CONFIG_LPC32XX_SSP
-#define CONFIG_LPC32XX_SSP_TIMEOUT 100000
-#define CONFIG_CMD_MAX6957
-#define CONFIG_CMD_HD44760
-/*
  * Environment
  */
 
-#define CONFIG_ENV_IS_IN_NAND		1
-#define CONFIG_ENV_SIZE			0x00020000
-#define CONFIG_ENV_OFFSET		0x00100000
-#define CONFIG_ENV_OFFSET_REDUND	0x00120000
-#define CONFIG_ENV_ADDR			0x80000100
-
 /*
  * Boot Linux
  */
@@ -153,7 +116,6 @@
 #define CONFIG_INITRD_TAG
 
 #define CONFIG_BOOTFILE			"uImage"
-#define CONFIG_BOOTARGS			"console=ttyS2,115200n8"
 #define CONFIG_LOADADDR			0x80008000
 
 /*
@@ -161,16 +123,11 @@
  */
 
 /* SPL will be executed at offset 0 */
-#define CONFIG_SPL_TEXT_BASE 0x00000000
 /* SPL will use SRAM as stack */
 #define CONFIG_SPL_STACK     0x0000FFF8
 /* Use the framework and generic lib */
-#define CONFIG_SPL_FRAMEWORK
 /* SPL will use serial */
 /* SPL will load U-Boot from NAND offset 0x40000 */
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SYS_NAND_U_BOOT_OFFS  0x00040000
 #define CONFIG_SPL_PAD_TO 0x20000
 /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */