X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fwb45n.h;h=43de2e11193315178ea6ce9591c7b8deda7ac776;hb=f89d6133eef2e068f9c33853b6584d7fcbfa9d2e;hp=371efa2f302e5040b75694ea1679293e71df5c26;hpb=f3177d02f33472352b022adbaf5c47cceebc930d;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h index 371efa2..43de2e1 100644 --- a/include/configs/wb45n.h +++ b/include/configs/wb45n.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Configuation settings for the WB45N CPU Module. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H__ @@ -31,12 +30,8 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */ @@ -44,7 +39,6 @@ (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) /* NAND flash */ -#define CONFIG_NAND_ATMEL #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 /* our ALE is AD21 */ @@ -54,15 +48,6 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512 - -#define CONFIG_MTD_DEVICE -#define CONFIG_CMD_MTDPARTS -#define CONFIG_MTD_PARTITIONS #define CONFIG_RBTREE #define CONFIG_LZO @@ -118,9 +103,6 @@ #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* * Size of malloc() pool @@ -128,8 +110,6 @@ #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) /* SPL */ -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x6000 #define CONFIG_SPL_STACK 0x308000 @@ -154,6 +134,5 @@ #define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif /* __CONFIG_H__ */