X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fwarp7.h;h=60a902b2c74735fb71e5ff45e06d7afb871a5ad2;hb=d789a8259e3b3b77e3eb2b090373ab2cbc225629;hp=fe9b7d57d768e5bd09fb8d9d90a9f5369c207a06;hpb=d9cb9aec743265b56a57e89ec20dde6f38d5e554;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/warp7.h b/include/configs/warp7.h index fe9b7d5..60a902b 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -1,9 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2016 NXP Semiconductors * * Configuration settings for the i.MX7S Warp board. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __WARP7_CONFIG_H @@ -14,14 +13,11 @@ #define PHYS_SDRAM_SIZE SZ_512M -#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR -#define CONFIG_SUPPORT_EMMC_BOOT #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 @@ -29,12 +25,25 @@ #define CONFIG_SERIAL_TAG #define CONFIG_DFU_ENV_SETTINGS \ - "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ + "dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \ + +/* When booting with FIT specify the node entry containing boot.scr */ +#if defined(CONFIG_FIT) +#define BOOT_SCR_STRING "source ${bootscriptaddr}:${bootscr_fitimage_name}\0" +#else +#define BOOT_SCR_STRING "source ${bootscriptaddr}\0" +#endif + +#ifndef CONFIG_OPTEE_LOAD_ADDR +#define CONFIG_OPTEE_LOAD_ADDR 0 +#endif #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_DFU_ENV_SETTINGS \ "script=boot.scr\0" \ + "bootscr_fitimage_name=bootscr\0" \ "script_signed=boot.scr.imx-signed\0" \ + "bootscriptaddr=0x83200000\0" \ "image=zImage\0" \ "console=ttymxc0\0" \ "ethact=usb_ether\0" \ @@ -42,6 +51,7 @@ "initrd_high=0xffffffff\0" \ "fdt_file=imx7s-warp.dtb\0" \ "fdt_addr=" __stringify(CONFIG_SYS_FDT_ADDR)"\0" \ + "fdtovaddr=0x83100000\0" \ "optee_addr=" __stringify(CONFIG_OPTEE_LOAD_ADDR)"\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ @@ -53,10 +63,18 @@ "root=PARTUUID=${uuid} rootwait rw\0" \ "ivt_offset=" __stringify(BOOTROM_IVT_HDR_OFFSET)"\0"\ "warp7_auth_or_fail=hab_auth_img_or_fail ${hab_ivt_addr} ${filesize} 0;\0" \ + "do_bootscript_hab=" \ + "if test ${hab_enabled} -eq 1; then " \ + "setexpr hab_ivt_addr ${bootscriptaddr} - ${ivt_offset}; " \ + "setenv script ${script_signed}; " \ + "load mmc ${mmcdev}:${mmcpart} ${hab_ivt_addr} ${script}; " \ + "run warp7_auth_or_fail; " \ + "run bootscript; "\ + "fi;\0" \ "loadbootscript=" \ - "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "load mmc ${mmcdev}:${mmcpart} ${bootscriptaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ + BOOT_SCR_STRING \ "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ @@ -79,6 +97,7 @@ #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev};" \ "mmc dev ${mmcdev}; if mmc rescan; then " \ + "run do_bootscript_hab;" \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ @@ -88,14 +107,10 @@ "fi; " \ "fi" -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM @@ -107,33 +122,32 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) +/* + * Environment starts at CONFIG_ENV_OFFSET= 0xC0000 = 768k = 768*1024 = 786432 + * + * Detect overlap between U-Boot image and environment area in build-time + * + * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.imx offset + * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408 + * + * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so + * write the direct value here + */ +#define CONFIG_BOARD_SIZE_LIMIT 785408 + /* I2C configs */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 #define CONFIG_SYS_I2C_SPEED 100000 -/* PMIC */ -#define CONFIG_POWER -#define CONFIG_POWER_I2C -#define CONFIG_POWER_PFUZE3000 -#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 - /* environment organization */ -#define CONFIG_ENV_SIZE SZ_8K -#define CONFIG_ENV_OFFSET (8 * SZ_64K) #define CONFIG_SYS_FSL_USDHC_NUM 1 #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 0 -/* USB Configs */ -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */ #define CONFIG_IMX_THERMAL