X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fvme8349.h;h=f40c9002e590efc9d085240a44eb661a5b9fe7bf;hb=a09fea1d28fe3c69a64bee092f5a764274d26ca2;hp=1aed81fc14ddb4d42becc2565e5c2df083b1b87b;hpb=380e86f361e4e2aef83295972863654fde157560;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index 1aed81f..f40c900 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * esd vme8349 U-Boot configuration file * Copyright (c) 2008, 2009 esd gmbh Hannover Germany @@ -7,8 +8,6 @@ * * reinhard.arlt@esd-electronics.de * Based on the MPC8349EMDS config. - * - * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -19,46 +18,13 @@ #define __CONFIG_H /* - * Top level Makefile configuration choices - */ -#ifdef CONFIG_CADDY2 -#define VME_CADDY2 -#endif - -/* * High Level Configuration Options */ #define CONFIG_E300 1 /* E300 Family */ -#define CONFIG_MPC834x 1 /* MPC834x family */ -#define CONFIG_MPC8349 1 /* MPC8349 specific */ -#define CONFIG_VME8349 1 /* ESD VME8349 board specific */ - -#define CONFIG_SYS_TEXT_BASE 0xFFF00000 - -#define CONFIG_MISC_INIT_R /* Don't enable PCI2 on vme834x - it doesn't exist physically. */ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ -#define CONFIG_PCI_66M -#ifdef CONFIG_PCI_66M -#define CONFIG_83XX_CLKIN 66000000 /* in Hz */ -#else -#define CONFIG_83XX_CLKIN 33000000 /* in Hz */ -#endif - -#ifndef CONFIG_SYS_CLK_FREQ -#ifdef CONFIG_PCI_66M -#define CONFIG_SYS_CLK_FREQ 66000000 -#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_4X1 -#else -#define CONFIG_SYS_CLK_FREQ 33000000 -#define HRCWL_CSB_TO_CLKIN HRCWL_CSB_TO_CLKIN_8X1 -#endif -#endif - -#define CONFIG_SYS_IMMR 0xE0000000 - #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ #define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ #define CONFIG_SYS_MEMTEST_END 0x00100000 @@ -85,9 +51,7 @@ */ #undef CONFIG_DDR_32BIT -#define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is sys memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE -#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is sys memory*/ #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075) #define CONFIG_DDR_2T_TIMING @@ -99,62 +63,12 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ -#ifdef VME_CADDY2 -#define CONFIG_SYS_FLASH_BASE 0xffc00000 /* start of FLASH */ -#define CONFIG_SYS_FLASH_SIZE 4 /* flash size in MB */ -#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ - BR_PS_16 | /* 16bit */ \ - BR_MS_GPCM | /* MSEL = GPCM */ \ - BR_V) /* valid */ - -#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \ - | OR_GPCM_XAM \ - | OR_GPCM_CSNT \ - | OR_GPCM_ACS_DIV2 \ - | OR_GPCM_XACS \ - | OR_GPCM_SCY_15 \ - | OR_GPCM_TRLX_SET \ - | OR_GPCM_EHTR_SET \ - | OR_GPCM_EAD) - /* 0xffc06ff7 */ -#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_4MB) -#else #define CONFIG_SYS_FLASH_BASE 0xf8000000 /* start of FLASH */ #define CONFIG_SYS_FLASH_SIZE 128 /* flash size in MB */ -#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ - BR_PS_16 | /* 16bit */ \ - BR_MS_GPCM | /* MSEL = GPCM */ \ - BR_V) /* valid */ - -#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \ - | OR_GPCM_XAM \ - | OR_GPCM_CSNT \ - | OR_GPCM_ACS_DIV2 \ - | OR_GPCM_XACS \ - | OR_GPCM_SCY_15 \ - | OR_GPCM_TRLX_SET \ - | OR_GPCM_EHTR_SET \ - | OR_GPCM_EAD) - /* 0xf8006ff7 */ -#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_128MB) -#endif -/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ + #define CONFIG_SYS_WINDOW1_BASE 0xf0000000 -#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_WINDOW1_BASE \ - | BR_PS_32 \ - | BR_MS_GPCM \ - | BR_V) - /* 0xF0001801 */ -#define CONFIG_SYS_OR1_PRELIM (OR_AM_256KB \ - | OR_GPCM_SETA) - /* 0xfffc0208 */ -#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_WINDOW1_BASE -#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_256KB) + #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device*/ @@ -182,21 +96,11 @@ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Malloc size */ -/* - * Local Bus LCRR and LBCR regs - * LCRR: no DLL bypass, Clock divider is 4 - * External Local Bus rate is - * CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV - */ -#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4 -#define CONFIG_SYS_LBC_LBCR 0x00000000 - #undef CONFIG_SYS_LB_SDRAM /* if board has SDRAM on local bus */ /* * Serial Port */ -#define CONFIG_CONS_INDEX 1 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) @@ -207,9 +111,6 @@ #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500) #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600) -#define CONFIG_CMDLINE_EDITING /* add command line history */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ - /* I2C */ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_FSL @@ -256,17 +157,6 @@ #if defined(CONFIG_PCI) -#define PCI_64BIT -#define PCI_ONE_PCI1 -#if defined(PCI_64BIT) -#undef PCI_ALL_PCI1 -#undef PCI_TWO_PCI1 -#undef PCI_ONE_PCI1 -#endif - -#ifndef VME_CADDY2 -#endif - #undef CONFIG_EEPRO100 #undef CONFIG_TULIP @@ -284,10 +174,6 @@ /* * TSEC configuration */ -#ifdef VME_CADDY2 -#else -#define CONFIG_TSEC_ENET /* TSEC ethernet support */ -#endif #if defined(CONFIG_TSEC_ENET) @@ -313,19 +199,7 @@ * Environment */ #ifndef CONFIG_SYS_RAMBOOT - #define CONFIG_ENV_IS_IN_FLASH - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + 0xc0000) - #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ - #define CONFIG_ENV_SIZE 0x2000 - /* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) - -#else - #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ - #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) - #define CONFIG_ENV_SIZE 0x2000 #endif #define CONFIG_LOADS_ECHO /* echo on for serial download */ @@ -335,21 +209,12 @@ * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. */ #define CONFIG_SYS_RTC_BUS_NUM 0x01 #define CONFIG_SYS_I2C_RTC_ADDR 0x32 -#define CONFIG_RTC_RX8025 -#define CONFIG_CMD_TSI148 - -#if defined(CONFIG_PCI) - #define CONFIG_CMD_PCI -#endif /* Pass Ethernet MAC to VxWorks */ #define CONFIG_SYS_VXWORKS_MAC_PTR 0x000043f0 @@ -359,19 +224,8 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#if defined(CONFIG_CMD_KGDB) - #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else - #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif - -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max num of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buf Size */ - /* * For booting Linux, the board info and command line data * have to be in the first 256 MB of memory, since this is @@ -381,51 +235,10 @@ #define CONFIG_SYS_RCWH_PCIHOST 0x80000000 /* PCIHOST */ -#define CONFIG_SYS_HRCW_LOW (\ - HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ - HRCWL_DDR_TO_SCB_CLK_1X1 |\ - HRCWL_CSB_TO_CLKIN |\ - HRCWL_VCO_1X2 |\ - HRCWL_CORE_TO_CSB_2X1) - -#if defined(PCI_64BIT) -#define CONFIG_SYS_HRCW_HIGH (\ - HRCWH_PCI_HOST |\ - HRCWH_64_BIT_PCI |\ - HRCWH_PCI1_ARBITER_ENABLE |\ - HRCWH_PCI2_ARBITER_DISABLE |\ - HRCWH_CORE_ENABLE |\ - HRCWH_FROM_0X00000100 |\ - HRCWH_BOOTSEQ_DISABLE |\ - HRCWH_SW_WATCHDOG_DISABLE |\ - HRCWH_ROM_LOC_LOCAL_16BIT |\ - HRCWH_TSEC1M_IN_GMII |\ - HRCWH_TSEC2M_IN_GMII) -#else -#define CONFIG_SYS_HRCW_HIGH (\ - HRCWH_PCI_HOST |\ - HRCWH_32_BIT_PCI |\ - HRCWH_PCI1_ARBITER_ENABLE |\ - HRCWH_PCI2_ARBITER_ENABLE |\ - HRCWH_CORE_ENABLE |\ - HRCWH_FROM_0X00000100 |\ - HRCWH_BOOTSEQ_DISABLE |\ - HRCWH_SW_WATCHDOG_DISABLE |\ - HRCWH_ROM_LOC_LOCAL_16BIT |\ - HRCWH_TSEC1M_IN_GMII |\ - HRCWH_TSEC2M_IN_GMII) -#endif - /* System IO Config */ #define CONFIG_SYS_SICRH 0 #define CONFIG_SYS_SICRL SICRL_LDP_A -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ - HID0_ENABLE_INSTRUCTION_CACHE) - -#define CONFIG_SYS_HID2 HID2_HBE - #define CONFIG_SYS_GPIO1_PRELIM #define CONFIG_SYS_GPIO1_DIR 0x00100000 #define CONFIG_SYS_GPIO1_DAT 0x00100000 @@ -434,84 +247,10 @@ #define CONFIG_SYS_GPIO2_DIR 0x78900000 #define CONFIG_SYS_GPIO2_DAT 0x70100000 -#define CONFIG_HIGH_BATS /* High BATs supported */ - -/* DDR @ 0x00000000 */ -#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ - BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \ - BATU_VS | BATU_VP) - -/* PCI @ 0x80000000 */ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW | \ - BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | \ - BATU_VS | BATU_VP) -#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE | BATL_PP_RW | \ - BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE | BATU_BL_256M | \ - BATU_VS | BATU_VP) -#else -#define CONFIG_SYS_IBAT1L (0) -#define CONFIG_SYS_IBAT1U (0) -#define CONFIG_SYS_IBAT2L (0) -#define CONFIG_SYS_IBAT2U (0) -#endif - -#ifdef CONFIG_MPC83XX_PCI2 -#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE | BATL_PP_RW | \ - BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE | BATU_BL_256M | \ - BATU_VS | BATU_VP) -#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE | BATL_PP_RW | \ - BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE | BATU_BL_256M | \ - BATU_VS | BATU_VP) -#else -#define CONFIG_SYS_IBAT3L (0) -#define CONFIG_SYS_IBAT3U (0) -#define CONFIG_SYS_IBAT4L (0) -#define CONFIG_SYS_IBAT4U (0) #endif -/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 */ -#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR | BATL_PP_RW | \ - BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | \ - BATU_VS | BATU_VP) - -#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_RW | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) - -#if (CONFIG_SYS_DDR_SIZE == 512) -#define CONFIG_SYS_IBAT7L (CONFIG_SYS_SDRAM_BASE+0x10000000 | \ - BATL_PP_RW | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT7U (CONFIG_SYS_SDRAM_BASE+0x10000000 | \ - BATU_BL_256M | BATU_VS | BATU_VP) -#else -#define CONFIG_SYS_IBAT7L (0) -#define CONFIG_SYS_IBAT7U (0) -#endif - -#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L -#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U -#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L -#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U -#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L -#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U -#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L -#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U -#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L -#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U -#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L -#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U -#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L -#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U -#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L -#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U - #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ #endif @@ -526,14 +265,12 @@ #define CONFIG_HAS_ETH1 #endif -#define CONFIG_HOSTNAME VME8349 +#define CONFIG_HOSTNAME "VME8349" #define CONFIG_ROOTPATH "/tftpboot/rootfs" #define CONFIG_BOOTFILE "uImage" #define CONFIG_LOADADDR 800000 /* def location for tftp and bootm */ -#undef CONFIG_BOOTARGS /* boot command will set bootargs */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "hostname=vme8349\0" \