X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fvision2.h;h=2d020ca8303b3589381a963d113504390909cb9d;hb=4e8b7544b796c4a8d4513b4070716ce42bfba840;hp=66795b531dcacf800893a88671e25b9626c87a88;hpb=1a0787d3c4f51cd1bcd2a1c71a2a10eccff0c3fd;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index 66795b5..2d020ca 100644
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -26,7 +26,6 @@
 
 
 #define CONFIG_MX51	/* in a mx51 */
-#define CONFIG_L2_OFF
 #define CONFIG_SYS_TEXT_BASE	0x97800000
 
 #include <asm/arch/imx-regs.h>
@@ -40,12 +39,14 @@
 #define CONFIG_REVISION_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
-#define BOARD_LATE_INIT
+#define CONFIG_BOARD_LATE_INIT
+
+#define CONFIG_MACH_TYPE	MACH_TYPE_TTC_VISION2
 
 /*
  * Size of malloc() pool
  */
-#define CONFIG_SYS_MALLOC_LEN		(2048 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
 
 /*
  * Hardware drivers
@@ -86,12 +87,15 @@
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 
 /* PMIC Controller */
-#define CONFIG_FSL_PMIC
+#define CONFIG_PMIC
+#define CONFIG_PMIC_SPI
+#define CONFIG_PMIC_FSL
 #define CONFIG_FSL_PMIC_BUS	0
 #define CONFIG_FSL_PMIC_CS	0
 #define CONFIG_FSL_PMIC_CLK	2500000
 #define CONFIG_FSL_PMIC_MODE	SPI_MODE_0
-#define CONFIG_RTC_MC13783
+#define CONFIG_FSL_PMIC_BITLEN	32
+#define CONFIG_RTC_MC13XXX
 
 /*
  * MMC Configs
@@ -115,7 +119,6 @@
  * Eth Configs
  */
 #define CONFIG_HAS_ETH1
-#define CONFIG_NET_MULTI
 #define CONFIG_MII
 #define CONFIG_DISCOVER_PHY
 
@@ -187,14 +190,15 @@
 #define PHYS_SDRAM_1_SIZE		(256 * 1024 * 1024)
 #define PHYS_SDRAM_2			CSD1_BASE_ADDR
 #define PHYS_SDRAM_2_SIZE		(256 * 1024 * 1024)
-#define CONFIG_SYS_SDRAM_BASE		0x90000000
-#define CONFIG_SYS_INIT_RAM_ADDR	0x1FFE8000
-
-#define CONFIG_SYS_INIT_RAM_SIZE		(64 * 1024)
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
-					GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
-					CONFIG_SYS_GBL_DATA_OFFSET)
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
 #define CONFIG_BOARD_EARLY_INIT_F
 
 /* 166 MHz DDR RAM */
@@ -207,12 +211,11 @@
  * Framebuffer and LCD
  */
 #define CONFIG_PREBOOT
-#define CONFIG_LCD
+#define CONFIG_VIDEO
 #define CONFIG_VIDEO_MX5
-#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define LCD_BPP		LCD_COLOR16
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_VIDEO_BMP_RLE8
 #define CONFIG_SPLASH_SCREEN
 #define CONFIG_CMD_BMP
 #define CONFIG_BMP_16BPP