X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fvexpress_aemv8a.h;h=3fda20a8f6c83077255a0fbf126cdfcc0465eade;hb=1d2f74690cace803844bce198a6d5fa1b6cd11f9;hp=e8517027e7df770a67a300becc7109756d5fc296;hpb=c0cae2e24552d57f3e2f841ec235453413cd7389;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index e851702..3fda20a 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -8,15 +8,19 @@ #ifndef __VEXPRESS_AEMV8A_H #define __VEXPRESS_AEMV8A_H -#define DEBUG +#define CONFIG_DM -#define CONFIG_REMAKE_ELF - -/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/ +/* We use generic board for v8 Versatile Express */ +#define CONFIG_SYS_GENERIC_BOARD -/*#define CONFIG_SYS_GENERIC_BOARD*/ +#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP +#ifndef CONFIG_SEMIHOSTING +#error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING +#endif +#define CONFIG_ARMV8_SWITCH_TO_EL1 +#endif -#define CONFIG_SYS_NO_FLASH +#define CONFIG_REMAKE_ELF #define CONFIG_SUPPORT_RAW_INITRD @@ -28,17 +32,20 @@ #define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a" /* Link Definitions */ -#define CONFIG_SYS_TEXT_BASE 0x80000000 +#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP +/* ATF loads u-boot here for BASE_FVP model */ +#define CONFIG_SYS_TEXT_BASE 0x88000000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000) +#elif CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_SYS_TEXT_BASE 0xe0000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) +#else +#error "Unknown board variant" +#endif /* Flat Device Tree Definitions */ #define CONFIG_OF_LIBFDT -#define CONFIG_DEFAULT_DEVICE_TREE vexpress64 - -/* SMP Spin Table Definitions */ -#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) - /* CS register bases for the original memory map. */ #define V2M_PA_CS0 0x00000000 #define V2M_PA_CS1 0x14000000 @@ -54,23 +61,21 @@ #define V2M_BASE 0x80000000 -/* - * Physical addresses, offset from V2M_PA_CS0-3 - */ -#define V2M_NOR0 (V2M_PA_CS0) -#define V2M_NOR1 (V2M_PA_CS4) -#define V2M_SRAM (V2M_PA_CS1) - /* Common peripherals relative to CS7. */ #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define V2M_UART0 0x7ff80000 +#define V2M_UART1 0x7ff70000 +#else /* Not Juno */ #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) +#endif #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) @@ -93,28 +98,61 @@ #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ /* Generic Interrupt Controller Definitions */ -#define GICD_BASE (0x2C001000) -#define GICC_BASE (0x2C002000) +#ifdef CONFIG_GICV3 +#define GICD_BASE (0x2f000000) +#define GICR_BASE (0x2f100000) +#else + +#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP +#define GICD_BASE (0x2f000000) +#define GICC_BASE (0x2c000000) +#elif CONFIG_TARGET_VEXPRESS64_JUNO +#define GICD_BASE (0x2C010000) +#define GICC_BASE (0x2C02f000) +#else +#error "Unknown board variant" +#endif +#endif /* !CONFIG_GICV3 */ #define CONFIG_SYS_MEMTEST_START V2M_BASE #define CONFIG_SYS_MEMTEST_END (V2M_BASE + 0x80000000) /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) - -/* SMSC91C111 Ethernet Configuration */ +#define CONFIG_SYS_MALLOC_F_LEN 0x2000 +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) + +/* Ethernet Configuration */ +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +/* The real hardware Versatile express uses SMSC9118 */ +#define CONFIG_SMC911X 1 +#define CONFIG_SMC911X_32_BIT 1 +#define CONFIG_SMC911X_BASE (0x018000000) +#else +/* The Vexpress64 simulators use SMSC91C111 */ #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE (0x01A000000) +#endif /* PL011 Serial Configuration */ +#define CONFIG_BAUDRATE 115200 +#ifdef CONFIG_DM +#define CONFIG_DM_SERIAL +#define CONFIG_PL01X_SERIAL +#else +#define CONFIG_SYS_SERIAL0 V2M_UART0 +#define CONFIG_SYS_SERIAL1 V2M_UART1 +#define CONFIG_CONS_INDEX 0 #define CONFIG_PL011_SERIAL +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_PL011_CLOCK 7273800 +#else #define CONFIG_PL011_CLOCK 24000000 +#endif #define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ (void *)CONFIG_SYS_SERIAL1} -#define CONFIG_CONS_INDEX 0 +#endif #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CONFIG_SYS_SERIAL0 V2M_UART0 #define CONFIG_SYS_SERIAL1 V2M_UART1 @@ -123,11 +161,13 @@ /*#define CONFIG_MENU_SHOW*/ #define CONFIG_CMD_CACHE #define CONFIG_CMD_BDI +#define CONFIG_CMD_BOOTI +#define CONFIG_CMD_UNZIP #define CONFIG_CMD_DHCP #define CONFIG_CMD_PXE #define CONFIG_CMD_ENV -#define CONFIG_CMD_FLASH #define CONFIG_CMD_IMI +#define CONFIG_CMD_LOADB #define CONFIG_CMD_MEMORY #define CONFIG_CMD_MII #define CONFIG_CMD_NET @@ -158,17 +198,60 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Initial environment variables */ +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +/* + * Defines where the kernel and FDT exist in NOR flash and where it will + * be copied into DRAM + */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_addr=0x200000\0" \ - "initrd_addr=0xa00000\0" \ - "initrd_size=0x2000000\0" \ - "fdt_addr=0x100000\0" \ - "fdt_high=0xa0000000\0" - -#define CONFIG_BOOTARGS "console=ttyAMA0 root=/dev/ram0" -#define CONFIG_BOOTCOMMAND "bootm $kernel_addr " \ - "$initrd_addr:$initrd_size $fdt_addr" -#define CONFIG_BOOTDELAY -1 + "kernel_name=Image\0" \ + "kernel_addr=0x80000000\0" \ + "fdt_name=juno\0" \ + "fdt_addr=0x83000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + +/* Assume we boot with root on the first partition of a USB stick */ +#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \ + "root=/dev/sda1 rw " \ + "earlyprintk=pl011,0x7ff80000 debug user_debug=31 "\ + "loglevel=9" + +/* Copy the kernel and FDT to DRAM memory and boot */ +#define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \ + "afs load ${fdt_name} ${fdt_addr} ; " \ + "fdt addr ${fdt_addr}; fdt resize; " \ + "booti ${kernel_addr} - ${fdt_addr}" + +#define CONFIG_BOOTDELAY 1 + +#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_name=uImage\0" \ + "kernel_addr=0x80000000\0" \ + "initrd_name=ramdisk.img\0" \ + "initrd_addr=0x88000000\0" \ + "fdt_name=devtree.dtb\0" \ + "fdt_addr=0x83000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" + +#define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\ + "0x1c090000 debug user_debug=31 "\ + "loglevel=9" + +#define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \ + "smhload ${fdt_name} $fdt_addr; " \ + "smhload ${initrd_name} $initrd_addr initrd_end; " \ + "fdt addr $fdt_addr; fdt resize; " \ + "fdt chosen $initrd_addr $initrd_end; " \ + "bootm $kernel_addr - $fdt_addr" + +#define CONFIG_BOOTDELAY 1 + +#else +#error "Unknown board variant" +#endif /* Do not preserve environment */ #define CONFIG_ENV_IS_NOWHERE 1 @@ -180,10 +263,33 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MAXARGS 64 /* max command args */ +/* Flash memory is available on the Juno board only */ +#ifndef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_SYS_NO_FLASH +#else +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_ARMFLASH +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_BASE 0x08000000 +#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MiB */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 + +/* Timeout values in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ + +/* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */ +#define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ +#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ +#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ + +#endif + #endif /* __VEXPRESS_AEMV8A_H */