X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fvcoreiii.h;h=2e150276e7a4182e49f2760e54fd964d27d784d6;hb=6786ce1ce14feb4d02854a0c04bc0cce505be46e;hp=8c30c6f09a2ddde016b0fcb54108a4d8704c69dd;hpb=0c3b301f79fcad081c8509ee4cb06e7b0478c8c1;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h
index 8c30c6f..2e15027 100644
--- a/include/configs/vcoreiii.h
+++ b/include/configs/vcoreiii.h
@@ -10,65 +10,22 @@
 
 /* Onboard devices */
 
-#define CONFIG_SYS_MALLOC_LEN		0x100000
-#define CONFIG_SYS_LOAD_ADDR		0x00100000
-#define CONFIG_SYS_INIT_SP_OFFSET       0x400000
+#define CFG_SYS_INIT_SP_OFFSET       0x400000
 
-#if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
-#define CPU_CLOCK_RATE			416666666 /* Clock for the MIPS core */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	208333333
-#else
-#define CPU_CLOCK_RATE			500000000 /* Clock for the MIPS core */
-#define CONFIG_SYS_MIPS_TIMER_FREQ	(CPU_CLOCK_RATE / 2)
-#endif
-#define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_MIPS_TIMER_FREQ
-
-#define CONFIG_BOARD_TYPES
-
-#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_OFFSET)
-#define CONFIG_ENV_OFFSET		(1024 * 1024)
-#define CONFIG_ENV_SIZE			(256 * 1024)
-#define CONFIG_ENV_SECT_SIZE		(256 * 1024)
-
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
-#define CONFIG_ENV_OFFSET_REDUND      (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
-
-#define CONFIG_ENV_SPI_MAX_HZ		0 /* This force to read from DT */
-#define CONFIG_ENV_SPI_MODE		0 /* This force to read from DT */
-#endif
+#define CFG_SYS_NS16550_CLK		CONFIG_SYS_MIPS_TIMER_FREQ
 
-#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define CFG_SYS_SDRAM_BASE		0x80000000
 #if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ)
-#define CONFIG_SYS_SDRAM_SIZE		(128 * SZ_1M)
+#define CFG_SYS_SDRAM_SIZE		(128 * SZ_1M)
 #elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT)
-#define CONFIG_SYS_SDRAM_SIZE		(256 * SZ_1M)
+#define CFG_SYS_SDRAM_SIZE		(256 * SZ_1M)
 #elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16)
-#define CONFIG_SYS_SDRAM_SIZE		(512 * SZ_1M)
+#define CFG_SYS_SDRAM_SIZE		(512 * SZ_1M)
 #else
 #error Unknown DDR size - please add!
 #endif
 
-#define CONFIG_CONS_INDEX		1
-
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - SZ_1M)
-
-#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_BOARD_EARLY_INIT_R
-#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
-#define VCOREIII_DEFAULT_MTD_ENV		    \
-	"mtdparts="CONFIG_MTDPARTS_DEFAULT"\0"	    \
-	"mtdids="CONFIG_MTDIDS_DEFAULT"\0"
-#else
-#define VCOREIII_DEFAULT_MTD_ENV    /* Go away */
-#endif
-
-#define CONFIG_SYS_BOOTM_LEN      (16 << 20)      /* Increase max gunzip size */
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	VCOREIII_DEFAULT_MTD_ENV					\
+#define CFG_EXTRA_ENV_SETTINGS					\
 	"loadaddr=0x81000000\0"						\
 	"spi_image_off=0x00100000\0"					\
 	"console=ttyS0,115200\0"					\