X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fusbarmory.h;h=4fb487bdeb150e3042f2aec3cae1710c2061424c;hb=55dabcc8f24598e2777f663de09ab55fbe1269da;hp=4bebc5959cccd581853b13ef41de9d5f753aa953;hpb=e090579d0a2d1aa38eab94b98877de9bcdd4f31d;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 4bebc59..4fb487b 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -1,49 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * USB armory MkI board configuration settings * http://inversepath.com/usbarmory * * Copyright (C) 2015, Inverse Path * Andrej Rosano - * - * SPDX-License-Identifier:|____GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H #define CONFIG_SYS_FSL_CLK -#define CONFIG_MXC_GPIO #include -#include - /* U-Boot environment */ -#define CONFIG_ENV_OFFSET (6 * 64 * 1024) -#define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_SYS_MMC_ENV_DEV 0 /* U-Boot general configurations */ #define CONFIG_SYS_CBSIZE 512 /* UART */ -#define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_CONS_INDEX 1 /* SD/MMC */ -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_NUM 1 /* USB */ -#define CONFIG_USB_EHCI_MX5 #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 /* I2C */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ @@ -53,11 +41,10 @@ /* U-Boot memory offsets */ #define CONFIG_LOADADDR 0x72000000 -#define CONFIG_SYS_TEXT_BASE 0x77800000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Linux boot */ -#define CONFIG_HOSTNAME usbarmory +#define CONFIG_HOSTNAME "usbarmory" #define CONFIG_BOOTCOMMAND \ "run distro_bootcmd; " \ "setenv bootargs console=${console} ${bootargs_default}; " \ @@ -89,7 +76,6 @@ #endif /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM CSD0_BASE_ADDR #define PHYS_SDRAM_SIZE (gd->ram_size) @@ -102,9 +88,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#define CONFIG_SYS_MEMTEST_START 0x70000000 -#define CONFIG_SYS_MEMTEST_END 0x90000000 - #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) #endif /* __CONFIG_H */