X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fusbarmory.h;h=27e61f5b8f46b614cdbc0f3caa5a6a913bee1db1;hb=78f67f11a9920ef988cbff5341616695c3e87ebd;hp=1c44f76b17131b8d086d6355387ebf9e11ba4340;hpb=ebca902aeb3af3eaedd2787928184ad84a86b98f;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 1c44f76..27e61f5 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -1,63 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * USB armory MkI board configuration settings * http://inversepath.com/usbarmory * * Copyright (C) 2015, Inverse Path * Andrej Rosano - * - * SPDX-License-Identifier:|____GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_FSL_CLK - #include /* U-Boot environment */ -#define CONFIG_ENV_OFFSET (6 * 64 * 1024) -#define CONFIG_ENV_SIZE (8 * 1024) -#define CONFIG_SYS_MMC_ENV_DEV 0 /* U-Boot general configurations */ -#define CONFIG_SYS_CBSIZE 512 /* UART */ -#define CONFIG_MXC_UART -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* SD/MMC */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 1 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB */ -#define CONFIG_USB_EHCI_MX5 -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 - -/* I2C */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ - -/* Fuse */ -#define CONFIG_FSL_IIM - -/* U-Boot memory offsets */ -#define CONFIG_LOADADDR 0x72000000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Linux boot */ -#define CONFIG_HOSTNAME "usbarmory" -#define CONFIG_BOOTCOMMAND \ - "run distro_bootcmd; " \ - "setenv bootargs console=${console} ${bootargs_default}; " \ - "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \ - "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \ - "bootz ${kernel_addr_r} - ${fdt_addr_r}" #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0) @@ -70,7 +40,7 @@ "pxefile_addr_r=0x70800000\0" \ "ramdisk_addr_r=0x73000000\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \ "fdtfile=imx53-usbarmory.dtb\0" \ @@ -83,22 +53,11 @@ #endif /* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM CSD0_BASE_ADDR #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE - -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -#define CONFIG_SYS_MEMTEST_START 0x70000000 -#define CONFIG_SYS_MEMTEST_END 0x90000000 - -#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #endif /* __CONFIG_H */