X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fti_omap3_common.h;h=cd6a9c21978167597439b5f0bdc18cdc62e01616;hb=313ed5d5050bc5603c9d78742363d077d3c53e0d;hp=be231a551361dc6392d10f7f203471367f255336;hpb=8968b914be7bfd67d179d0395898bd9db67aaad1;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index be231a5..cd6a9c2 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -14,34 +14,26 @@ #ifndef __CONFIG_TI_OMAP3_COMMON_H__ #define __CONFIG_TI_OMAP3_COMMON_H__ +/* + * High Level Configuration Options + */ #include #include -#ifndef CONFIG_SPL_BUILD -# define CONFIG_OMAP_SERIAL -#endif - -/* Common ARM Erratas */ -#define CONFIG_ARM_ERRATA_454179 -#define CONFIG_ARM_ERRATA_430973 -#define CONFIG_ARM_ERRATA_621766 - -/* The chip has SDRC controller */ -#define CONFIG_SDRC - /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) /* NS16550 Configuration */ #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ -#define CONFIG_SYS_NS16550 -#ifdef CONFIG_SPL_BUILD -# define CONFIG_SYS_NS16550_SERIAL -# define CONFIG_SYS_NS16550_REG_SIZE (-4) -# define CONFIG_SYS_NS16550_CLK V_NS16550_CLK -#endif +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#if defined(CONFIG_SPL_BUILD) +#define CONFIG_SYS_NS16550_SERIAL +#if !defined(CONFIG_DM_SERIAL) +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#endif /* !CONFIG_DM_SERIAL */ +#endif /* CONFIG_SPL_BUILD */ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 115200} @@ -65,21 +57,12 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) -/* TWL4030 */ -#define CONFIG_TWL4030_POWER 1 - /* SPL */ #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (54 * 1024) -#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" -#define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (64 << 20)) - #ifdef CONFIG_NAND -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SYS_NAND_BASE 0x30000000 #endif