X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fti_armv7_keystone2.h;h=a47f0902a267e556e6617cbddbeee088693d265f;hb=ac2587907b5473779c80e0eb8478b67997c14439;hp=564af6dc2dcf1668653703c0968cd1089614c868;hpb=ca8a329a1b7f3195ee56fee4c0906ee883383dfa;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 564af6d..a47f090 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -12,13 +12,10 @@
 /* U-Boot Build Configuration */
 
 /* SoC Configuration */
-#define CONFIG_SPL_TARGET		"u-boot-spi.gph"
 
 /* Memory Configuration */
-#define CONFIG_SYS_LPAE_SDRAM_BASE	0x800000000
-#define CONFIG_MAX_RAM_BANK_SIZE	(2 << 30)       /* 2GB */
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_ISW_ENTRY_ADDR - \
-					GENERATED_GBL_DATA_SIZE)
+#define CFG_SYS_LPAE_SDRAM_BASE	0x800000000
+#define CFG_MAX_RAM_BANK_SIZE	(2 << 30)       /* 2GB */
 
 #ifdef CONFIG_SYS_MALLOC_F_LEN
 #define SPL_MALLOC_F_SIZE	CONFIG_SYS_MALLOC_F_LEN
@@ -27,71 +24,44 @@
 #endif
 
 /* SPL SPI Loader Configuration */
-#define CONFIG_SPL_BSS_START_ADDR	(CONFIG_ISW_ENTRY_ADDR + \
-					CONFIG_SPL_MAX_SIZE)
-#define CONFIG_SPL_BSS_MAX_SIZE		(32 * 1024)
-#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
-					CONFIG_SPL_BSS_MAX_SIZE)
-#define CONFIG_SYS_SPL_MALLOC_SIZE	(32 * 1024)
 #define KEYSTONE_SPL_STACK_SIZE		(8 * 1024)
-#define CONFIG_SPL_STACK		(CONFIG_SYS_SPL_MALLOC_START + \
-					CONFIG_SYS_SPL_MALLOC_SIZE + \
-					SPL_MALLOC_F_SIZE + \
-					KEYSTONE_SPL_STACK_SIZE - 4)
 
 /* SRAM scratch space entries  */
-#define SRAM_SCRATCH_SPACE_ADDR	CONFIG_SPL_STACK + 0x8
+#define SRAM_SCRATCH_SPACE_ADDR		0xc0c23fc
 
 #define TI_SRAM_SCRATCH_BOARD_EEPROM_START	(SRAM_SCRATCH_SPACE_ADDR)
 #define TI_SRAM_SCRATCH_BOARD_EEPROM_END	(SRAM_SCRATCH_SPACE_ADDR + 0x200)
 #define KEYSTONE_SRAM_SCRATCH_SPACE_END		(TI_SRAM_SCRATCH_BOARD_EEPROM_END)
 
 /* UART Configuration */
-#define CONFIG_SYS_NS16550_MEM32
-#define CONFIG_SYS_NS16550_COM1		KS2_UART0_BASE
-#define CONFIG_SYS_NS16550_COM2		KS2_UART1_BASE
+#define CFG_SYS_NS16550_COM1		KS2_UART0_BASE
+#define CFG_SYS_NS16550_COM2		KS2_UART1_BASE
 
 #ifndef CONFIG_SOC_K2G
-#define CONFIG_SYS_NS16550_CLK		ks_clk_get_rate(KS2_CLK1_6)
+#define CFG_SYS_NS16550_CLK		ks_clk_get_rate(KS2_CLK1_6)
 #else
-#define CONFIG_SYS_NS16550_CLK		ks_clk_get_rate(uart_pll_clk) / 2
+#define CFG_SYS_NS16550_CLK		ks_clk_get_rate(uart_pll_clk) / 2
 #endif
 
 /* SPI Configuration */
-#define CONFIG_SYS_SPI_CLK		ks_clk_get_rate(KS2_CLK1_6)
-
-/* Network Configuration */
-#define CONFIG_SYS_SGMII_REFCLK_MHZ	312
-#define CONFIG_SYS_SGMII_LINERATE_MHZ	1250
-#define CONFIG_SYS_SGMII_RATESCALE	2
+#define CFG_SYS_SPI_CLK		ks_clk_get_rate(KS2_CLK1_6)
 
 /* Keystone net */
-#define CONFIG_KSNET_MAC_ID_BASE		KS2_MAC_ID_BASE_ADDR
-#define CONFIG_KSNET_NETCP_BASE			KS2_NETCP_BASE
-#define CONFIG_KSNET_SERDES_SGMII_BASE		KS2_SGMII_SERDES_BASE
-#define CONFIG_KSNET_SERDES_SGMII2_BASE		KS2_SGMII_SERDES2_BASE
-#define CONFIG_KSNET_SERDES_LANES_PER_SGMII	KS2_LANES_PER_SGMII_SERDES
-
-/* I2C Configuration */
-#define CONFIG_SYS_DAVINCI_I2C_SPEED	100000
-#define CONFIG_SYS_DAVINCI_I2C_SLAVE	0x10 /* SMBus host address */
-#define CONFIG_SYS_DAVINCI_I2C_SPEED1	100000
-#define CONFIG_SYS_DAVINCI_I2C_SLAVE1	0x10 /* SMBus host address */
-#define CONFIG_SYS_DAVINCI_I2C_SPEED2	100000
-#define CONFIG_SYS_DAVINCI_I2C_SLAVE2	0x10 /* SMBus host address */
+#define CFG_KSNET_MAC_ID_BASE		KS2_MAC_ID_BASE_ADDR
+#define CFG_KSNET_NETCP_BASE			KS2_NETCP_BASE
+#define CFG_KSNET_SERDES_SGMII_BASE		KS2_SGMII_SERDES_BASE
+#define CFG_KSNET_SERDES_SGMII2_BASE		KS2_SGMII_SERDES2_BASE
+#define CFG_KSNET_SERDES_LANES_PER_SGMII	KS2_LANES_PER_SGMII_SERDES
 
 /* EEPROM definitions */
 
 /* NAND Configuration */
-#define CONFIG_SYS_NAND_MASK_CLE		0x4000
-#define CONFIG_SYS_NAND_MASK_ALE		0x2000
-#define CONFIG_SYS_NAND_CS			2
-#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
+#define CFG_SYS_NAND_MASK_CLE		0x4000
+#define CFG_SYS_NAND_MASK_ALE		0x2000
+#define CFG_SYS_NAND_CS			2
 
-#define CONFIG_SYS_NAND_LARGEPAGE
-#define CONFIG_SYS_NAND_BASE_LIST		{ 0x30000000, }
-#define CONFIG_SYS_MAX_NAND_DEVICE		1
-#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
+#define CFG_SYS_NAND_LARGEPAGE
+#define CFG_SYS_NAND_BASE_LIST		{ 0x30000000, }
 
 #define DFU_ALT_INFO_MMC \
 	"dfu_alt_info_mmc=" \
@@ -136,7 +106,7 @@
 		"rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; "	\
 		"rproc start ${dev_pmmc}\0"				\
 
-#define CONFIG_EXTRA_ENV_SETTINGS					\
+#define CFG_EXTRA_ENV_SETTINGS					\
 	DEFAULT_LINUX_BOOT_ENV						\
 	ENV_KS2_BOARD_SETTINGS						\
 	DFUARGS								\
@@ -178,7 +148,7 @@
 		"sf write ${loadaddr} 0 ${filesize}\0"		\
 	"burn_uboot_nand=nand erase 0 0x100000; "			\
 		"nand write ${loadaddr} 0 ${filesize}\0"		\
-	"args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1 "	\
+	"args_all=setenv bootargs console=ttyS0,115200n8 rootwait "	\
 		KERNEL_MTD_PARTS					\
 	"args_net=setenv bootargs ${bootargs} rootfstype=nfs "		\
 		"root=/dev/nfs rw nfsroot=${serverip}:${nfs_root},"	\
@@ -197,9 +167,7 @@
 	"args_ramfs=setenv bootargs ${bootargs} "			\
 		"rdinit=/sbin/init rw root=/dev/ram0 "			\
 		"initrd=0x808080000,80M\0"				\
-	"no_post=1\0"							\
-	"mtdparts=mtdparts=davinci_nand.0:"				\
-		"1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
+	"no_post=1\0"
 
 /* Now for the remaining common defines */
 #include <configs/ti_armv7_common.h>
@@ -208,9 +176,9 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/clock.h>
 #ifndef CONFIG_SOC_K2G
-#define CONFIG_SYS_HZ_CLOCK		ks_clk_get_rate(KS2_CLK1_6)
+#define CFG_SYS_HZ_CLOCK		ks_clk_get_rate(KS2_CLK1_6)
 #else
-#define CONFIG_SYS_HZ_CLOCK		get_external_clk(sys_clk)
+#define CFG_SYS_HZ_CLOCK		get_external_clk(sys_clk)
 #endif
 
 #endif /* __CONFIG_KS2_EVM_H */