X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fthunderx_88xx.h;h=d07a8fe86bc60441e68ab5e982f24c8cdbcfba19;hb=d2e5250be49fce4653689c41a5dc7e2d7e7ecf33;hp=4387082b263e7fb12c86f122347e821b5554dfbd;hpb=f85fad024f208ceedb3ce0bb1819936e62a0983e;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h
index 4387082..d07a8fe 100644
--- a/include/configs/thunderx_88xx.h
+++ b/include/configs/thunderx_88xx.h
@@ -1,26 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /**
  * (C) Copyright 2014, Cavium Inc.
- *
- * SPDX-License-Identifier:	GPL-2.0+
 **/
 
 #ifndef __THUNDERX_88XX_H__
 #define __THUNDERX_88XX_H__
 
-#define CONFIG_REMAKE_ELF
-
 #define CONFIG_THUNDERX
 
 #define CONFIG_SYS_64BIT
 
-#define CONFIG_SYS_NO_FLASH
-
 #define MEM_BASE			0x00500000
 
 #define CONFIG_SYS_LOWMEM_BASE		MEM_BASE
 
 /* Link Definitions */
-#define CONFIG_SYS_TEXT_BASE		0x00500000
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fff0)
 
 /* SMP Spin Table Definitions */
@@ -29,17 +23,9 @@
 /* Generic Timer Definitions */
 #define COUNTER_FREQUENCY		(0x1800000)	/* 24MHz */
 
-#define CONFIG_SYS_MEMTEST_START	MEM_BASE
-#define CONFIG_SYS_MEMTEST_END		(MEM_BASE + PHYS_SDRAM_1_SIZE)
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
-
 /* PL011 Serial Configuration */
 
-#define CONFIG_PL01X_SERIAL
 #define CONFIG_PL011_CLOCK		24000000
-#define CONFIG_CONS_INDEX		1
 
 /* Generic Interrupt Controller Definitions */
 #define GICD_BASE			(0x801000000000)
@@ -47,23 +33,9 @@
 #define CONFIG_SYS_SERIAL0		0x87e024000000
 #define CONFIG_SYS_SERIAL1		0x87e025000000
 
-#define CONFIG_BAUDRATE			115200
-
-/* Command line configuration */
-#define CONFIG_MENU
-
-/* BOOTP options */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_PXE
-
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_LOAD_ADDR		(MEM_BASE)
 
 /* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS		1
 #define PHYS_SDRAM_1			(MEM_BASE)	  /* SDRAM Bank #1 */
 #define PHYS_SDRAM_1_SIZE		(0x80000000-MEM_BASE)	/* 2048 MB */
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
@@ -76,26 +48,11 @@
 					"fdt_addr=0x94C00000\0"		\
 					"fdt_high=0x9fffffff\0"
 
-#define CONFIG_BOOTARGS			\
-					"console=ttyAMA0,115200n8 " \
-					"earlycon=pl011,0x87e024000000 " \
-					"debug maxcpus=48 rootwait rw "\
-					"root=/dev/sda2 coherent_pool=16M"
-
 /* Do not preserve environment */
-#define CONFIG_ENV_IS_NOWHERE		1
-#define CONFIG_ENV_SIZE			0x1000
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					 sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING		1
 #define CONFIG_SYS_MAXARGS		64		/* max command args */
-#define CONFIG_NO_RELOCATION		1
-#define CONFIG_LIB_RAND
 #define PLL_REF_CLK			50000000	/* 50 MHz */
 #define NS_PER_REF_CLK_TICK		(1000000000/PLL_REF_CLK)