X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Ftegra30-common.h;h=2beca3b16662bce39f4213dbb886cf19ac8206ff;hb=72d81360aabd0485d3832d292bbea29c7c4554ef;hp=2d8948d9d983c2548706261bfdc534f3daab2dca;hpb=da206916a14fc8ab8962763c47673128a29b4b9c;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index 2d8948d..2beca3b 100644
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -42,16 +42,16 @@
  * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows
  *   for the FDT/DTB to be up to 1M, which is hopefully plenty.
  */
-#define CONFIG_LOADADDR 0x81000000
+#define CONFIG_SYS_LOAD_ADDR 0x81000000
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"scriptaddr=0x90000000\0" \
 	"pxefile_addr_r=0x90100000\0" \
-	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+	"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+	"fdtfile=" FDTFILE "\0" \
 	"fdt_addr_r=0x83000000\0" \
 	"ramdisk_addr_r=0x83100000\0"
 
 /* Defines for SPL */
-#define CONFIG_SPL_TEXT_BASE		0x80108000
 #define CONFIG_SYS_SPL_MALLOC_START	0x80090000
 #define CONFIG_SPL_STACK		0x800ffffc