X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Ftegra210-common.h;h=1b8e94b60cc6fef4f4557c43b94f0f3ce710584b;hb=f0e236c8d6646f6ef0ebf8f043962a07dda3b3a3;hp=8f35a7bf3dc691e432154b9ac6608012a38c0961;hpb=13a3972585af60ec367d209cedbd3601e0c77467;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h
index 8f35a7b..1b8e94b 100644
--- a/include/configs/tegra210-common.h
+++ b/include/configs/tegra210-common.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2013-2015
  * NVIDIA Corporation <www.nvidia.com>
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #ifndef _TEGRA210_COMMON_H_
@@ -10,24 +9,11 @@
 
 #include "tegra-common.h"
 
-/* Cortex-A57 uses a cache line size of 64 bytes */
-#define CONFIG_SYS_CACHELINE_SIZE	64
-
 /*
  * NS16550 Configuration
  */
 #define V_NS16550_CLK		408000000	/* 408MHz (pllp_out0) */
 
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_STACKBASE	0x82800000	/* 40MB */
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_SYS_TEXT_BASE	0x80110000
-
 /* Generic Interrupt Controller */
 #define CONFIG_GICV2
 
@@ -60,18 +46,12 @@
 	"scriptaddr=0x90000000\0" \
 	"pxefile_addr_r=0x90100000\0" \
 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
-	"fdt_addr_r=0x82000000\0" \
-	"ramdisk_addr_r=0x82100000\0"
-
-/* Defines for SPL */
-#define CONFIG_SPL_TEXT_BASE		0x80108000
-#define CONFIG_SYS_SPL_MALLOC_START	0x80090000
-#define CONFIG_SPL_STACK		0x800ffffc
+	"fdt_addr_r=0x83000000\0" \
+	"ramdisk_addr_r=0x83200000\0"
 
 /* For USB EHCI controller */
 #define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
-#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
 
 /* GPU needs setup */
 #define CONFIG_TEGRA_GPU