X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Ftegra20-common.h;h=15bd9bb1460dfe1d6b91fc9fe7d376096cef4cea;hb=bb367b95f9204115bd6eac82e839b5590e6da4eb;hp=4c02f205437ac8364515c61826308c4231b8d2fa;hpb=8f082d78fafd94db3f21b503794e0875d3331e53;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index 4c02f20..15bd9bb 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -24,14 +24,7 @@
 #ifndef __TEGRA20_COMMON_H
 #define __TEGRA20_COMMON_H
 #include <asm/sizes.h>
-
-/*
- * QUOTE(m) will evaluate to a string version of the value of the macro m
- * passed in.  The extra level of indirection here is to first evaluate the
- * macro m before applying the quoting operator.
- */
-#define QUOTE_(m)       #m
-#define QUOTE(m)        QUOTE_(m)
+#include <linux/stringify.h>
 
 /*
  * High Level Configuration Options
@@ -43,7 +36,7 @@
 
 #define CONFIG_SYS_CACHELINE_SIZE	32
 
-#include <asm/arch/tegra20.h>		/* get chip and board defs */
+#include <asm/arch/tegra.h>		/* get chip and board defs */
 
 /*
  * Display CPU and Board information
@@ -54,11 +47,12 @@
 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
 #define CONFIG_OF_LIBFDT		/* enable passing of devicetree */
 
-#ifdef CONFIG_TEGRA20_LP0
+#ifdef CONFIG_TEGRA_LP0
 #define TEGRA_LP0_ADDR			0x1C406000
 #define TEGRA_LP0_SIZE			0x2000
 #define TEGRA_LP0_VEC \
-	"lp0_vec=" QUOTE(TEGRA_LP0_SIZE) "@" QUOTE(TEGRA_LP0_ADDR) " "
+	"lp0_vec=" __stringify(TEGRA_LP0_SIZE)	\
+	"@" __stringify(TEGRA_LP0_ADDR) " "
 #else
 #define TEGRA_LP0_VEC
 #endif
@@ -113,6 +107,8 @@
 
 /* include default commands */
 #include <config_cmd_default.h>
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
 
 /* remove unused commands */
 #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect */
@@ -132,9 +128,9 @@
 /* Environment information, boards can override if required */
 #define CONFIG_CONSOLE_MUX
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define TEGRA20_DEVICE_SETTINGS	"stdin=serial\0" \
-					"stdout=serial\0" \
-					"stderr=serial\0"
+#define TEGRA_DEVICE_SETTINGS	"stdin=serial\0" \
+				"stdout=serial\0" \
+				"stderr=serial\0"
 
 #define CONFIG_LOADADDR		0x408000	/* def. location for kernel */
 #define CONFIG_BOOTDELAY	2		/* -1 to disable auto boot */
@@ -157,7 +153,7 @@
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
 
-#define CONFIG_SYS_MEMTEST_START	(TEGRA20_SDRC_CS0 + 0x600000)
+#define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
 
 #define CONFIG_SYS_LOAD_ADDR		(0xA00800)	/* default */
@@ -169,12 +165,15 @@
  * Physical Memory Map
  */
 #define CONFIG_NR_DRAM_BANKS	1
-#define PHYS_SDRAM_1		TEGRA20_SDRC_CS0
+#define PHYS_SDRAM_1		NV_PA_SDRC_CS0
 #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */
 
 #define CONFIG_SYS_TEXT_BASE	0x0010c000
+#define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
 
+#define CONFIG_SYS_BOOTMAPSZ	(256 << 20) /* 256M */
+
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_STACKBASE
 #define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
@@ -188,9 +187,13 @@
 
 /* Defines for SPL */
 #define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_RAM_DEVICE
+#define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_TEXT_BASE		0x00108000
-#define CONFIG_SPL_MAX_SIZE		0x00004000
+#define CONFIG_SPL_MAX_SIZE		(CONFIG_SYS_TEXT_BASE - \
+						CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SYS_SPL_MALLOC_START	0x00090000
 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
 #define CONFIG_SPL_STACK		0x000ffffc
@@ -201,4 +204,7 @@
 #define CONFIG_SPL_GPIO_SUPPORT
 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/tegra20/u-boot-spl.lds"
 
+#define CONFIG_SYS_NAND_SELF_INIT
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+
 #endif /* __TEGRA20_COMMON_H */