X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Ftegra20-common.h;h=063213cbfeb7e9ee33707cba849e7837b9b4c6e4;hb=5fac11e6d5ab350429b8c8ddf47d3d3877ca89d1;hp=e58477e2898ebf973d9dcd9813e297956105fca4;hpb=da206916a14fc8ab8962763c47673128a29b4b9c;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index e58477e..063213c 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -46,16 +46,15 @@
  * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows
  *   for the FDT/DTB to be up to 1M, which is hopefully plenty.
  */
-#define CONFIG_LOADADDR 0x01000000
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"scriptaddr=0x10000000\0" \
 	"pxefile_addr_r=0x10100000\0" \
-	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
+	"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+	"fdtfile=" FDTFILE "\0" \
 	"fdt_addr_r=0x03000000\0" \
 	"ramdisk_addr_r=0x03100000\0"
 
 /* Defines for SPL */
-#define CONFIG_SPL_TEXT_BASE		0x00108000
 #define CONFIG_SYS_SPL_MALLOC_START	0x00090000
 #define CONFIG_SPL_STACK		0x000ffffc
 
@@ -79,9 +78,7 @@
  * packets depending on the buffer address and size.
  */
 #define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
-#define CONFIG_EHCI_IS_TDI
 
 #define CONFIG_SYS_NAND_SELF_INIT
-#define CONFIG_SYS_NAND_ONFI_DETECTION
 
 #endif /* _TEGRA20_COMMON_H_ */