X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Ftegra186-common.h;h=968501602aaa42a65df37ff523a88b21c199ed48;hb=92832045c54586e9dffa082ff8cd8c2ef6040757;hp=98e4fc2d252babd82d65230479223cb42353104b;hpb=c6b968da78ce3fa7224c0ddf15fe170c7c05b27e;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/tegra186-common.h b/include/configs/tegra186-common.h index 98e4fc2..9685016 100644 --- a/include/configs/tegra186-common.h +++ b/include/configs/tegra186-common.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright 2013-2016, NVIDIA CORPORATION. - * - * SPDX-License-Identifier: GPL-2.0 */ #ifndef _TEGRA186_COMMON_H_ @@ -14,19 +13,15 @@ */ #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ -/* - * Miscellaneous configurable options - */ -#define CONFIG_STACKBASE 0x82800000 /* 40MB */ - /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_SYS_TEXT_BASE 0x80080000 - -/* Generic Interrupt Controller */ -#define CONFIG_GICV2 +#undef FDTFILE +#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \ + "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \ + "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; " \ + "fi; " /* * Memory layout for where various images get loaded by boot scripts: @@ -52,17 +47,11 @@ * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ -#define CONFIG_LOADADDR 0x80080000 #define MEM_LAYOUT_ENV_SETTINGS \ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ - "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "fdt_addr_r=0x82000000\0" \ "ramdisk_addr_r=0x82100000\0" -/* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x80108000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 -#define CONFIG_SPL_STACK 0x800ffffc - #endif