X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Ftegra114-common.h;h=d3a704569767deba1fe9414a7e65069f6736410d;hb=504bf790da08db9b4a443566cf6ef577f9c7996a;hp=aab9d01147d240cc567b8415afddb45abec43519;hpb=278b90ce786f73faf29aa522d5d101e1da006378;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index aab9d01..d3a7045 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -1,7 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. - * - * SPDX-License-Identifier: GPL-2.0 */ #ifndef _TEGRA114_COMMON_H_ @@ -16,7 +15,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x82800000 /* 40MB */ +#define CONFIG_STACKBASE 0x83800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map @@ -37,13 +36,13 @@ * should not overlap that area, or the kernel will have to copy itself * somewhere else before decompression. Similarly, the address of any other * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the + * this up to 32M allows for a sizable kernel to be decompressed below the * compressed load address. * - * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for - * the compressed kernel to be up to 16M too. + * fdt_addr_r simply shouldn't overlap anything else. Choosing 48M allows for + * the compressed kernel to be up to 32M too. * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 49M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ #define CONFIG_LOADADDR 0x81000000 @@ -51,11 +50,10 @@ "scriptaddr=0x90000000\0" \ "pxefile_addr_r=0x90100000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ - "fdt_addr_r=0x82000000\0" \ - "ramdisk_addr_r=0x82100000\0" + "fdt_addr_r=0x83000000\0" \ + "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x80108000 #define CONFIG_SYS_SPL_MALLOC_START 0x80090000 #define CONFIG_SPL_STACK 0x800ffffc