X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Ftegra114-common.h;h=107a0f8803313fd82d4b120a5ba63d008f01a8d4;hb=529fb062081e100faae6dc0d163a548b8528ff24;hp=671071ba9810f692aaf07900d73dc4611c71d149;hpb=930c514d47a29e1f94a5b61fe965400a4f5635c3;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 671071b..107a0f8 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -1,26 +1,13 @@ /* * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . + * SPDX-License-Identifier: GPL-2.0 */ #ifndef _TEGRA114_COMMON_H_ #define _TEGRA114_COMMON_H_ #include "tegra-common.h" -/* Cortex-A15 uses a cache line size of 64 bytes */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* * NS16550 Configuration */