X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Ftegra-common.h;h=432eceaf3513112b1960b7632a4cdd64ccf45d42;hb=ab92b38a0161f0d8efa1c2112d944ef8f755dfbe;hp=f30fec84a2a856fa4f94eca7fd989427aa5eff26;hpb=0675f992dbf4a785a05a1baf149c2bce6aa5fe90;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index f30fec8..432ecea 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  *  (C) Copyright 2010-2012
  *  NVIDIA Corporation <www.nvidia.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _TEGRA_COMMON_H_
@@ -13,7 +12,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_ARMCORTEXA9		/* This is an ARM V7 CPU core */
 #define CONFIG_SYS_L2CACHE_OFF		/* No L2 cache */
 
 #include <asm/arch/tegra.h>		/* get chip and board defs */
@@ -27,8 +25,6 @@
 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
 
 /* Environment */
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-#define CONFIG_ENV_SIZE			0x2000	/* Total Size Environment */
 
 /*
  * NS16550 Configuration
@@ -43,77 +39,45 @@
 #define CONFIG_SYS_MMC_MAX_DEVICE 4
 
 /*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX	1
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE			115200
-
-/* turn on command-line edit/hist/auto */
-#define CONFIG_COMMAND_HISTORY
-
-/* turn on commonly used storage-related commands */
-#define CONFIG_PARTITION_UUIDS
-#define CONFIG_CMD_PART
-
-#define CONFIG_SYS_NO_FLASH
-
-/*
  * Increasing the size of the IO buffer as default nfsargs size is more
  *  than 256 and so it is not possible to edit it
  */
 #define CONFIG_SYS_CBSIZE		(1024 * 2) /* Console I/O Buffer Size */
 /* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					sizeof(CONFIG_SYS_PROMPT) + 16)
 #define CONFIG_SYS_MAXARGS		64	/* max number of command args */
 
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
 
-#define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
+#ifdef CONFIG_ARM64
+#define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#else
+#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#endif
 
 /*-----------------------------------------------------------------------
  * Physical Memory Map
  */
-#define CONFIG_NR_DRAM_BANKS	2
 #define PHYS_SDRAM_1		NV_PA_SDRC_CS0
 #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */
 
-#define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
 
 #define CONFIG_SYS_BOOTMAPSZ	(256 << 20)	/* 256M */
 
+#ifndef CONFIG_ARM64
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_STACKBASE
 #define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
 						CONFIG_SYS_INIT_RAM_SIZE - \
 						GENERATED_GBL_DATA_SIZE)
+#endif
 
-#define CONFIG_CMD_ENTERRCM
-
+#ifndef CONFIG_ARM64
 /* Defines for SPL */
-#define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_NAND_SIMPLE
 #define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_TEXT_BASE - \
 						CONFIG_SPL_TEXT_BASE)
 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00010000
-
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_BOARD_LATE_INIT
-
-/* Misc utility code */
-#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_CRC32_VERIFY
-
-#ifndef CONFIG_SPL_BUILD
-#include <config_distro_defaults.h>
-#define CONFIG_FAT_WRITE
 #endif
 
 #endif /* _TEGRA_COMMON_H_ */