X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Ftao3530.h;h=a95cbed33aec9ec8eaec578dba29f63dba9c2895;hb=bdf97b5d393fc94666a847e9bac1c358b2c63c59;hp=45318706b8d553a32e796e51e93544ece12a3fc1;hpb=278b90ce786f73faf29aa522d5d101e1da006378;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 4531870..a95cbed 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Configuration settings for the TechNexion TAO-3530 SOM * equipped on Thunder baseboard. @@ -6,8 +7,6 @@ * Tapani Utriainen * * Copyright (C) 2013 Stefan Roese - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H @@ -24,8 +23,6 @@ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MISC_INIT_R - #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG @@ -53,14 +50,12 @@ /* * select serial console configuration */ -#define CONFIG_CONS_INDEX 3 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE /* commands to include */ -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_SYS_I2C #define CONFIG_I2C_MULTI_BUS @@ -68,13 +63,10 @@ /* * TWL4030 */ -#define CONFIG_TWL4030_LED /* * Board NAND Info. */ -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ /* to access nand at */ /* CS0 */ @@ -137,13 +129,9 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ /* turn on command-line edit/hist/auto */ -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_ALT_MEMTEST 1 #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ /* defaults */ #define CONFIG_SYS_MEMTEST_END (0x83FFFFFF) /* 64MB */ @@ -163,7 +151,6 @@ /* * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */ #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 @@ -204,7 +191,6 @@ #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162 /* Defines for SPL */ -#define CONFIG_SPL_FRAMEWORK #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" @@ -233,7 +219,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -#define CONFIG_SPL_TEXT_BASE 0x40200800 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE)