X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsunxi-common.h;h=91751171ec2bb791256da43359953d719b2f115d;hb=002e91087c817f8281fccee327e0d8e98c691a2f;hp=51815600d4a27cf6f78c6ab38356bf161d29f208;hpb=d482a8dfba417c6554f054ca74281d8d32384ed7;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5181560..9175117 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -32,6 +32,10 @@ # define CONFIG_MACH_TYPE_COMPAT_REV 1 #endif +#ifdef CONFIG_ARM64 +#define CONFIG_BUILD_TARGET "u-boot.itb" +#endif + /* Serial & console */ #define CONFIG_SYS_NS16550_SERIAL /* ns16550 reg in the low bits of cpu reg */ @@ -69,7 +73,12 @@ #define SDRAM_OFFSET(x) 0x4##x #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */ +/* V3s do not have enough memory to place code at 0x4a000000 */ +#ifndef CONFIG_MACH_SUN8I_V3S #define CONFIG_SYS_TEXT_BASE 0x4a000000 +#else +#define CONFIG_SYS_TEXT_BASE 0x42e00000 +#endif /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here * since it needs to fit in with the other values. By also #defining it * we get warnings if the Kconfig value mismatches. */ @@ -113,7 +122,6 @@ #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -#define CONFIG_SCSI #endif #define CONFIG_SETUP_MEMORY_TAGS @@ -140,37 +148,39 @@ #endif #if defined(CONFIG_ENV_IS_IN_MMC) -#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */ +#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 +/* If we have two devices (most likely eMMC + MMC), favour the eMMC */ +#define CONFIG_SYS_MMC_ENV_DEV 1 +#else +/* Otherwise, use the only device we have */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#endif #define CONFIG_SYS_MMC_MAX_DEVICE 4 +#elif defined(CONFIG_ENV_IS_NOWHERE) +#define CONFIG_ENV_SIZE (128 << 10) #endif +#ifndef CONFIG_MACH_SUN8I_V3S /* 64MB of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20)) +#else +/* 2MB of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20)) +#endif /* * Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ - -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* standalone support */ #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR -/* baudrate */ - -/* The stack sizes are set up in start.S using the settings below */ -#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ - /* FLASH and environment organization */ #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ -#define CONFIG_FAT_WRITE /* enable write access */ - #define CONFIG_SPL_FRAMEWORK #ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */ @@ -178,21 +188,22 @@ #endif #ifdef CONFIG_SUNXI_HIGH_SRAM -#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */ -#define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB */ +#define CONFIG_SPL_TEXT_BASE 0x10060 /* sram start+header */ +#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */ +#ifdef CONFIG_ARM64 +/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */ +#define LOW_LEVEL_SRAM_STACK 0x00054000 +#else #define LOW_LEVEL_SRAM_STACK 0x00018000 +#endif /* !CONFIG_ARM64 */ #else -#define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */ -#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */ +#define CONFIG_SPL_TEXT_BASE 0x60 /* sram start+header */ +#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */ #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ #endif #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK -#ifndef CONFIG_ARM64 -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" -#endif - #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */ @@ -204,11 +215,13 @@ #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \ defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \ defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MVTWSI +#ifndef CONFIG_DM_I2C +#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_SLAVE 0x7f #endif +#endif #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) #define CONFIG_SYS_I2C_SOFT @@ -234,10 +247,6 @@ extern int soft_i2c_gpio_scl; defined CONFIG_SY8106A_POWER #endif -#ifndef CONFIG_CONS_INDEX -#define CONFIG_CONS_INDEX 1 /* UART0 */ -#endif - #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE #if CONFIG_CONS_INDEX == 1 #ifdef CONFIG_MACH_SUN9I @@ -285,11 +294,9 @@ extern int soft_i2c_gpio_scl; #ifdef CONFIG_SUNXI_EMAC #define CONFIG_PHY_ADDR 1 #define CONFIG_MII /* MII PHY management */ -#define CONFIG_PHYLIB #endif -#ifdef CONFIG_SUNXI_GMAC -#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ +#ifdef CONFIG_SUN7I_GMAC #define CONFIG_PHY_ADDR 1 #define CONFIG_MII /* MII PHY management */ #define CONFIG_PHY_REALTEK @@ -299,7 +306,6 @@ extern int soft_i2c_gpio_scl; #define CONFIG_USB_OHCI_NEW #define CONFIG_USB_OHCI_SUNXI #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 -#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 #endif #ifdef CONFIG_USB_MUSB_SUNXI @@ -307,29 +313,14 @@ extern int soft_i2c_gpio_scl; #endif #ifdef CONFIG_USB_MUSB_GADGET -#define CONFIG_USB_FUNCTION_FASTBOOT #define CONFIG_USB_FUNCTION_MASS_STORAGE #endif -#ifdef CONFIG_USB_FUNCTION_FASTBOOT -#define CONFIG_CMD_FASTBOOT -#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000 -#define CONFIG_ANDROID_BOOT_IMAGE - -#define CONFIG_FASTBOOT_FLASH - -#ifdef CONFIG_MMC -#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0 -#endif -#endif - #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE #endif #ifdef CONFIG_USB_KEYBOARD #define CONFIG_PREBOOT -#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE #endif #define CONFIG_MISC_INIT_R @@ -347,6 +338,7 @@ extern int soft_i2c_gpio_scl; * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd. * Align the initrd to a 2MB page. */ +#define BOOTM_SIZE __stringify(0xa000000) #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000)) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000)) @@ -359,16 +351,30 @@ extern int soft_i2c_gpio_scl; * 32M uncompressed kernel, 16M compressed kernel, 1M fdt, * 1M script, 1M pxe and the ramdisk at the end. */ - +#ifndef CONFIG_MACH_SUN8I_V3S +#define BOOTM_SIZE __stringify(0xa000000) #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000)) #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000)) #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000)) #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000)) #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000)) +#else +/* + * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc. + * 16M uncompressed kernel, 8M compressed kernel, 1M fdt, + * 1M script, 1M pxe and the ramdisk at the end. + */ +#define BOOTM_SIZE __stringify(0x2e00000) +#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000)) +#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000)) +#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000)) +#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000)) +#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000)) +#endif #endif #define MEM_LAYOUT_ENV_SETTINGS \ - "bootm_size=0xa000000\0" \ + "bootm_size=" BOOTM_SIZE "\0" \ "kernel_addr_r=" KERNEL_ADDR_R "\0" \ "fdt_addr_r=" FDT_ADDR_R "\0" \ "scriptaddr=" SCRIPT_ADDR_R "\0" \ @@ -382,15 +388,28 @@ extern int soft_i2c_gpio_scl; "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0" #ifdef CONFIG_MMC -#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 -#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1) +#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \ + BOOTENV_DEV_MMC(MMC, mmc, 0) \ + BOOTENV_DEV_MMC(MMC, mmc, 1) \ + "bootcmd_mmc_auto=" \ + "if test ${mmc_bootdev} -eq 1; then " \ + "run bootcmd_mmc1; " \ + "run bootcmd_mmc0; " \ + "elif test ${mmc_bootdev} -eq 0; then " \ + "run bootcmd_mmc0; " \ + "run bootcmd_mmc1; " \ + "fi\0" + +#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \ + "mmc_auto " + +#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na) #else -#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) +#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) #endif #else #define BOOT_TARGET_DEVICES_MMC(func) -#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) #endif #ifdef CONFIG_AHCI @@ -418,7 +437,6 @@ extern int soft_i2c_gpio_scl; #define BOOT_TARGET_DEVICES(func) \ func(FEL, fel, na) \ BOOT_TARGET_DEVICES_MMC(func) \ - BOOT_TARGET_DEVICES_MMC_EXTRA(func) \ BOOT_TARGET_DEVICES_SCSI(func) \ BOOT_TARGET_DEVICES_USB(func) \ func(PXE, pxe, na) \ @@ -455,22 +473,49 @@ extern int soft_i2c_gpio_scl; #define CONSOLE_STDOUT_SETTINGS \ "stdout=serial,vga\0" \ "stderr=serial,vga\0" +#elif CONFIG_DM_VIDEO +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONSOLE_STDOUT_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" #else #define CONSOLE_STDOUT_SETTINGS \ "stdout=serial\0" \ "stderr=serial\0" #endif +#ifdef CONFIG_MTDIDS_DEFAULT +#define SUNXI_MTDIDS_DEFAULT \ + "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" +#else +#define SUNXI_MTDIDS_DEFAULT +#endif + +#ifdef CONFIG_MTDPARTS_DEFAULT +#define SUNXI_MTDPARTS_DEFAULT \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" +#else +#define SUNXI_MTDPARTS_DEFAULT +#endif + #define CONSOLE_ENV_SETTINGS \ CONSOLE_STDIN_SETTINGS \ CONSOLE_STDOUT_SETTINGS +#ifdef CONFIG_ARM64 +#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" +#else +#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ DFU_ALT_INFO_RAM \ - "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "fdtfile=" FDTFILE "\0" \ "console=ttyS0,115200\0" \ + SUNXI_MTDIDS_DEFAULT \ + SUNXI_MTDPARTS_DEFAULT \ BOOTCMD_SUNXI_COMPAT \ BOOTENV