X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fstrider.h;h=972543d6bd10b2e2d2eed92c9f72041c727b0478;hb=2fe88d452268d61b5ca9cb0b1dda2974cc43faeb;hp=14b03c813b6423982251121cf64e58e0547aa0e8;hpb=4bafceff0e9e5a36908031e41c69a6b37e82da58;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/strider.h b/include/configs/strider.h
index 14b03c8..972543d 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2014
- * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
+ * Dirk Eibach,  Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
  *
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -18,14 +17,8 @@
 #define CONFIG_MPC8308		1 /* MPC8308 CPU specific */
 #define CONFIG_STRIDER		1 /* STRIDER board specific */
 
-#define CONFIG_BOARD_EARLY_INIT_R
-#define CONFIG_LAST_STAGE_INIT
-
-#define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC83xx_ESDHC_ADDR
 
-#define CONFIG_SYS_ALT_MEMTEST
-
 /*
  * System Clock Setup
  */
@@ -208,15 +201,12 @@
 /*
  * FLASH on the Local Bus
  */
-#define CONFIG_SYS_FLASH_CFI		/* use the Common Flash Interface */
-#define CONFIG_FLASH_CFI_DRIVER		/* use the CFI driver */
 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
 #define CONFIG_FLASH_CFI_LEGACY
 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
 
 #define CONFIG_SYS_FLASH_BASE		0xFE000000 /* FLASH base address */
 #define CONFIG_SYS_FLASH_SIZE		8 /* FLASH size is up to 8M */
-#define CONFIG_SYS_FLASH_PROTECTION	1 /* Use h/w Flash protection. */
 
 /* Window base at flash base */
 #define CONFIG_SYS_LBLAWBAR0_PRELIM	CONFIG_SYS_FLASH_BASE
@@ -278,7 +268,6 @@
 /*
  * Serial Port
  */
-#define CONFIG_CONS_INDEX	2
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	1
 #define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
@@ -504,14 +493,12 @@ void fpga_control_clear(unsigned int bus, int pin);
 /*
  * TSEC
  */
-#define CONFIG_TSEC_ENET	/* TSEC ethernet support */
 #define CONFIG_SYS_TSEC1_OFFSET	0x24000
 #define CONFIG_SYS_TSEC1	(CONFIG_SYS_IMMR+CONFIG_SYS_TSEC1_OFFSET)
 
 /*
  * TSEC ethernet configuration
  */
-#define CONFIG_MII		1 /* MII PHY management */
 #define CONFIG_TSEC1
 #define CONFIG_TSEC1_NAME	"eTSEC0"
 #define TSEC1_PHY_ADDR		1
@@ -618,7 +605,7 @@ void fpga_control_clear(unsigned int bus, int pin);
 #define CONFIG_LOADADDR	800000	/* default location for tftp and bootm */
 
 
-#define CONFIG_HOSTNAME		hrcon
+#define CONFIG_HOSTNAME		"hrcon"
 #define CONFIG_ROOTPATH		"/opt/nfsroot"
 #define CONFIG_BOOTFILE		"uImage"