X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fstmark2.h;h=ce941d832a5482722aedd5f5ab3fa9e4fa470254;hb=54f80dd2908af0b851816cf062edf2d454948397;hp=b0a89734feb7ea36546aef68b51f2cfb066871f3;hpb=167f699ba142193e67cade8d19127cfda723ce38;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index b0a8973..ce941d8 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -8,9 +8,7 @@
 #ifndef __STMARK2_CONFIG_H
 #define __STMARK2_CONFIG_H
 
-#define CONFIG_HOSTNAME			"stmark2"
-
-#define CONFIG_SYS_UART_PORT		0
+#define CFG_SYS_UART_PORT		0
 
 #define LDS_BOARD_TEXT						\
 	board/sysam/stmark2/sbf_dram_init.o (.text*)
@@ -34,47 +32,36 @@
 		"sf write ${loadaddr} 0x00800000 ${filesize}\0"	\
 	""
 
-/* Realtime clock */
-#define CONFIG_RTC_MCFRRTC
-#define CONFIG_SYS_MCFRRTC_BASE		0xFC0A8000
-
-#define CONFIG_SYS_SBFHDR_SIZE		0x7
+#define CFG_SYS_SBFHDR_SIZE		0x7
 
 /* Input, PCI, Flexbus, and VCO */
-#define CONFIG_EXTRA_CLOCK
 
 #define CONFIG_PRAM			2048	/* 2048 KB */
 
-#define CONFIG_SYS_MBAR			0xFC000000
+#define CFG_SYS_MBAR			0xFC000000
 
 /*
  * Definitions for initial stack pointer and data area (in internal SRAM)
  */
-#define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
+#define CFG_SYS_INIT_RAM_ADDR	0x80000000
 /* End of used area in internal SRAM */
-#define CONFIG_SYS_INIT_RAM_SIZE	0x10000
-#define CONFIG_SYS_INIT_RAM_CTRL	0x221
-#define CONFIG_SYS_GBL_DATA_OFFSET	((CONFIG_SYS_INIT_RAM_SIZE - \
+#define CFG_SYS_INIT_RAM_SIZE	0x10000
+#define CFG_SYS_INIT_RAM_CTRL	0x221
+#define CFG_SYS_INIT_SP_OFFSET	((CFG_SYS_INIT_RAM_SIZE - \
 					GENERATED_GBL_DATA_SIZE) - 32)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-#define CONFIG_SYS_SBFHDR_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - 32)
+#define CFG_SYS_SBFHDR_DATA_OFFSET	(CFG_SYS_INIT_RAM_SIZE - 32)
 
 /*
  * Start addresses for the final memory configuration
  * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
+ * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
  */
-#define CONFIG_SYS_SDRAM_BASE		0x40000000
-#define CONFIG_SYS_SDRAM_SIZE		128	/* SDRAM size in MB */
+#define CFG_SYS_SDRAM_BASE		0x40000000
+#define CFG_SYS_SDRAM_SIZE		128	/* SDRAM size in MB */
 
-#define CONFIG_SYS_DRAM_TEST
-
-#if defined(CONFIG_CF_SBF)
-#define CONFIG_SERIAL_BOOT
-#endif
+#define CFG_SYS_DRAM_TEST
 
 /* Reserve 256 kB for Monitor */
-#define CONFIG_SYS_MONITOR_LEN		(256 << 10)
 
 /*
  * For booting Linux, the board info and command line data
@@ -82,38 +69,30 @@
  * the maximum mapped by the Linux kernel during initialization ??
  */
 /* Initial Memory map for Linux */
-#define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + \
-					(CONFIG_SYS_SDRAM_SIZE << 20))
+#define CFG_SYS_BOOTMAPSZ		(CFG_SYS_SDRAM_BASE + \
+					(CFG_SYS_SDRAM_SIZE << 20))
 
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash
  */
 
 /* Cache Configuration */
-#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
-					 CONFIG_SYS_INIT_RAM_SIZE - 8)
-#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
-					 CONFIG_SYS_INIT_RAM_SIZE - 4)
-#define CONFIG_SYS_ICACHE_INV		(CF_CACR_BCINVA + CF_CACR_ICINVA)
-#define CONFIG_SYS_DCACHE_INV		(CF_CACR_DCINVA)
-#define CONFIG_SYS_CACHE_ACR2		(CONFIG_SYS_SDRAM_BASE | \
-					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+#define ICACHE_STATUS			(CFG_SYS_INIT_RAM_ADDR + \
+					 CFG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS			(CFG_SYS_INIT_RAM_ADDR + \
+					 CFG_SYS_INIT_RAM_SIZE - 4)
+#define CFG_SYS_ICACHE_INV		(CF_CACR_BCINVA + CF_CACR_ICINVA)
+#define CFG_SYS_DCACHE_INV		(CF_CACR_DCINVA)
+#define CFG_SYS_CACHE_ACR2		(CFG_SYS_SDRAM_BASE | \
+					 CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
 					 CF_ACR_EN | CF_ACR_SM_ALL)
-#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_BEC | CF_CACR_IEC | \
+#define CFG_SYS_CACHE_ICACR		(CF_CACR_BEC | CF_CACR_IEC | \
 					 CF_CACR_ICINVA | CF_CACR_EUSP)
-#define CONFIG_SYS_CACHE_DCACR		((CONFIG_SYS_CACHE_ICACR | \
+#define CFG_SYS_CACHE_DCACR		((CFG_SYS_CACHE_ICACR | \
 					 CF_CACR_DEC | CF_CACR_DDCM_P | \
 					 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
 
-#define CACR_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
-					CONFIG_SYS_INIT_RAM_SIZE - 12)
-
-#ifdef CONFIG_MCFFEC
-#define CONFIG_SYS_DISCOVER_PHY
-/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
-#ifndef CONFIG_SYS_DISCOVER_PHY
-#define FECDUPLEX			FULL
-#define FECSPEED			_100BASET
-#endif /* CONFIG_SYS_DISCOVER_PHY */
-#endif
+#define CACR_STATUS			(CFG_SYS_INIT_RAM_ADDR + \
+					CFG_SYS_INIT_RAM_SIZE - 12)
+
 #endif /* __STMARK2_CONFIG_H */