X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsocrates.h;h=96410413a0f4f81fce7d0ba69ff7029e6e7860b4;hb=4b142febff71eabdb7ddbb125c7b583b24ddc434;hp=c67db8f25d9f73ab230002e78e00eca5bf02c68c;hpb=f82642e33899766892499b163e60560fbbf87773;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index c67db8f..9641041 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -82,7 +82,6 @@
  */
 #define CONFIG_L2_CACHE			/* toggle L2 cache		*/
 #define CONFIG_BTB			/* toggle branch predition	*/
-#define CONFIG_ADDR_STREAMING		/* toggle addr streaming	*/
 
 #define CONFIG_SYS_INIT_DBCR DBCR_IDM		/* Enable Debug Exceptions	*/
 
@@ -167,7 +166,6 @@
 #define CONFIG_SYS_LBC_LSRT		0x20000000    /* LB sdram refresh timer	*/
 #define CONFIG_SYS_LBC_MRTPR		0x20000000    /* LB refresh timer presc.*/
 
-#define CONFIG_L1_INIT_RAM
 #define CONFIG_SYS_INIT_RAM_LOCK	1
 #define CONFIG_SYS_INIT_RAM_ADDR	0xe4010000	/* Initial RAM address	*/
 #define CONFIG_SYS_INIT_RAM_END	0x4000		/* End used area in RAM	*/
@@ -188,7 +186,6 @@
 
 #define CONFIG_SYS_NAND_BASE		(CONFIG_SYS_FPGA_BASE + 0x70)
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS		1
 #define CONFIG_CMD_NAND
 
 /* LIME GDC */
@@ -199,11 +196,13 @@
 
 #define CONFIG_VIDEO
 #define CONFIG_VIDEO_MB862xx
+#define CONFIG_VIDEO_MB862xx_ACCEL
 #define CONFIG_CFB_CONSOLE
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_CONSOLE_EXTRA_INFO
 #define VIDEO_FB_16BPP_PIXEL_SWAP
+#define VIDEO_FB_16BPP_WORD_SWAP
 #define CONFIG_VGA_AS_SINGLE_DEVICE
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_VIDEO_SW_CURSOR
@@ -211,6 +210,11 @@
 #define CONFIG_VIDEO_BMP_GZIP
 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	(2 << 20)	/* decompressed img */
 
+/* SDRAM Clock frequency, 100MHz (0x0000) or 133MHz (0x10000) */
+#define CONFIG_SYS_MB862xx_CCF		0x10000
+/* SDRAM parameter */
+#define CONFIG_SYS_MB862xx_MMR		0x4157BA63
+
 /* Serial Port */
 
 #define CONFIG_CONS_INDEX     1
@@ -246,7 +250,6 @@
 #define CONFIG_SYS_I2C_OFFSET		0x3000
 
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_CMD_TREE
 #define CONFIG_SYS_I2C2_OFFSET		0x3100
 
 /* I2C RTC */