X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsocfpga_sr1500.h;h=984f1183fdd693f6c5835a403ca421ba2140e8e9;hb=d01806a8fcbdaedcc67cead56ece572021d97ab7;hp=4366061f77ea6332c485d4a62088701855805f51;hpb=541f538f4ca50082f77f7f34f05950d57804b1cc;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index 4366061..984f118 100644
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -1,15 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright (C) 2015 Stefan Roese <sr@denx.de>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 #ifndef __CONFIG_SOCFPGA_SR1500_H__
 #define __CONFIG_SOCFPGA_SR1500_H__
 
 #include <asm/arch/base_addr_ac5.h>
 
-#define CONFIG_HW_WATCHDOG
-
 /* Memory configurations */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1GiB on SR1500 */
 
@@ -20,11 +17,9 @@
 /* Ethernet on SoC (EMAC) */
 #define CONFIG_PHY_INTERFACE_MODE	PHY_INTERFACE_MODE_RGMII
 /* The PHY is autodetected, so no MII PHY address is needed here */
-#define CONFIG_PHY_MARVELL
 #define PHY_ANEG_TIMEOUT	8000
 
 /* Environment */
-#define CONFIG_ENV_IS_IN_SPI_FLASH
 
 /* Enable SPI NOR flash reset, needed for SPI booting */
 #define CONFIG_SPI_N25Q256A_RESET
@@ -32,9 +27,6 @@
 /*
  * Bootcounter
  */
-#define CONFIG_BOOTCOUNT_LIMIT
-/* last 2 lwords in OCRAM */
-#define CONFIG_SYS_BOOTCOUNT_ADDR	0xfffffff8
 #define CONFIG_SYS_BOOTCOUNT_BE
 
 /* Environment setting for SPI flash */