X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsocfpga_soc64_common.h;h=4a0235de8f5939e03c499efbaf06bb9ec34c4192;hb=7cfbba36e9f84312afe8cd6d12db4e9e9c1e04b5;hp=1cfa1900478700cce4af2d7325798f9a62612e35;hpb=b0a75dda7e542c9ddea685ceb2251118638829d5;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 1cfa190..4a0235d 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -7,21 +7,17 @@ #ifndef __CONFIG_SOCFPGA_SOC64_COMMON_H__ #define __CONFIG_SOCFPGA_SOC64_COMMON_H__ -#include -#include +#include +#include #include /* * U-Boot general configurations */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_LOADADDR 0x2000000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_REMAKE_ELF /* sysmgr.boot_scratch_cold4 & 5 (64bit) will be used for PSCI_CPU_ON call */ #define CPU_RELEASE_ADDR 0xFFD12210 -#define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_SYS_MEM_RESERVE_SECURE 0 /* using OCRAM, not DDR */ /* * U-Boot console configurations @@ -43,13 +39,12 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR \ + CONFIG_SYS_INIT_RAM_SIZE \ - - S10_HANDOFF_SIZE) + - SOC64_HANDOFF_SIZE) #else #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE \ + 0x100000) #endif #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_SP_ADDR) -#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024) /* * U-Boot environment configurations @@ -118,11 +113,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); "socfpga_legacy_reset_compat=1\0" /* - * Generic Interrupt Controller Definitions - */ -#define CONFIG_GICV2 - -/* * External memory configurations */ #define PHYS_SDRAM_1 0x0