X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsocfpga_common.h;h=58a65508449148b2fe590d44fb5645d26019de4a;hb=529fb062081e100faae6dc0d163a548b8528ff24;hp=cd48c9e1caf5da04b39d04165d05da561af77a33;hpb=88033d737d9f46e7eebda6a8f9770957eb9aae9c;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index cd48c9e..58a6550 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -6,7 +6,6 @@ #ifndef __CONFIG_SOCFPGA_COMMON_H__ #define __CONFIG_SOCFPGA_COMMON_H__ - /* Virtual target or real hardware */ #undef CONFIG_SOCFPGA_VIRTUAL_TARGET @@ -15,7 +14,6 @@ /* * High level configuration */ -#define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_ARCH_MISC_INIT #define CONFIG_ARCH_EARLY_INIT_R @@ -65,10 +63,8 @@ #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ #define CONFIG_AUTO_COMPLETE /* Command auto complete */ #define CONFIG_CMDLINE_EDITING /* Command history etc */ -#define CONFIG_SYS_HUSH_PARSER #ifndef CONFIG_SYS_HOSTNAME #define CONFIG_SYS_HOSTNAME CONFIG_SYS_BOARD @@ -77,7 +73,6 @@ /* * Cache */ -#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS @@ -90,10 +85,7 @@ * EPCS/EPCQx1 Serial Flash Controller */ #ifdef CONFIG_ALTERA_SPI -#define CONFIG_CMD_SPI -#define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH_BAR /* * The base address is configurable in QSys, each board must specify the * base address based on it's particular FPGA configuration. Please note @@ -178,7 +170,6 @@ * I2C support */ #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_DW #define CONFIG_SYS_I2C_BUS_MAX 4 #define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS #define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS @@ -199,7 +190,6 @@ unsigned int cm_get_l4_sp_clk_hz(void); #define IC_CLK (cm_get_l4_sp_clk_hz() / 1000000) #endif -#define CONFIG_CMD_I2C /* * QSPI support @@ -218,13 +208,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() #endif #define CONFIG_CQSPI_DECODER 0 -#define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH_BAR /* * Designware SPI support */ -#define CONFIG_CMD_SPI /* * Serial Driver @@ -245,46 +232,28 @@ unsigned int cm_get_qspi_controller_clk_hz(void); */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 -#define CONFIG_USB_STORAGE #endif /* * USB Gadget (DFU, UMS) */ #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) -#define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_DWC2_OTG -#define CONFIG_USB_GADGET_DUALSPEED -#define CONFIG_USB_GADGET_VBUS_DRAW 2 - -/* USB Composite download gadget - g_dnl */ -#define CONFIG_USB_GADGET_DOWNLOAD #define CONFIG_USB_FUNCTION_MASS_STORAGE -#define CONFIG_USB_FUNCTION_DFU -#ifdef CONFIG_DM_MMC -#define CONFIG_DFU_MMC -#endif #define CONFIG_SYS_DFU_DATA_BUF_SIZE (32 * 1024 * 1024) #define DFU_DEFAULT_POLL_TIMEOUT 300 /* USB IDs */ -#define CONFIG_G_DNL_VENDOR_NUM 0x0525 /* NetChip */ -#define CONFIG_G_DNL_PRODUCT_NUM 0xA4A5 /* Linux-USB File-backed Storage Gadget */ -#define CONFIG_G_DNL_UMS_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM -#define CONFIG_G_DNL_UMS_PRODUCT_NUM CONFIG_G_DNL_PRODUCT_NUM -#ifndef CONFIG_G_DNL_MANUFACTURER -#define CONFIG_G_DNL_MANUFACTURER CONFIG_SYS_VENDOR -#endif +#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 #endif /* * U-Boot environment */ -#define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE -#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE +#if !defined(CONFIG_ENV_SIZE) #define CONFIG_ENV_SIZE 4096 +#endif /* Environment for SDMMC boot */ #if defined(CONFIG_ENV_IS_IN_MMC) && !defined(CONFIG_ENV_OFFSET) @@ -292,6 +261,12 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_ENV_OFFSET 512 /* just after the MBR */ #endif +/* Environment for QSPI boot */ +#if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_OFFSET) +#define CONFIG_ENV_OFFSET 0x00100000 +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#endif + /* * mtd partitioning for serial NOR flash * @@ -317,7 +292,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* UBI and UBIFS support */ #if defined(CONFIG_CMD_SF) || defined(CONFIG_CMD_NAND) -#define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS #define CONFIG_RBTREE #define CONFIG_LZO @@ -338,40 +312,19 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE (64 * 1024) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MALLOC_SIMPLE -#endif - -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_WATCHDOG_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#ifdef CONFIG_DM_MMC -#define CONFIG_SPL_MMC_SUPPORT -#endif -#ifdef CONFIG_DM_SPI -#define CONFIG_SPL_SPI_SUPPORT -#endif -#ifdef CONFIG_SPL_NAND_DENALI -#define CONFIG_SPL_NAND_SUPPORT -#endif /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 2 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img" -#define CONFIG_SPL_LIBDISK_SUPPORT #else -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 3 -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xa00 /* offset 2560 sect (1M+256k) */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 #endif #endif /* SPL QSPI boot support */ #ifdef CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 #endif