X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsocfpga_common.h;h=441e3545aa4d06ff7f8ead9a420160fd49ca36f7;hb=f113d7d3034672de7d074506a05a7055f1f0dcae;hp=410ec80618f5890e1606863ff60d3826f7991416;hpb=4f17f2966a8d7b624b5aff58ebe5a0245038c25a;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 410ec80..441e354 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -5,20 +5,12 @@ #ifndef __CONFIG_SOCFPGA_COMMON_H__ #define __CONFIG_SOCFPGA_COMMON_H__ -/* - * High level configuration - */ -#define CONFIG_CLOCKS - -#define CONFIG_TIMESTAMP /* Print image info with timestamp */ +#include /* * Memory configurations */ #define PHYS_SDRAM_1 0x0 -#define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 -#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE #if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 #define CONFIG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE @@ -43,10 +35,6 @@ #if ((CONFIG_SYS_BOOTCOUNT_ADDR > CONFIG_SYS_INIT_RAM_ADDR) && \ (CONFIG_SYS_BOOTCOUNT_ADDR < (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE))) -#define CONFIG_SPL_STACK CONFIG_SYS_BOOTCOUNT_ADDR -#else -#define CONFIG_SPL_STACK \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE) #endif /* @@ -54,22 +42,13 @@ * phase of U-Boot, too. This prevents overwriting SPL data if stack/heap usage * in U-Boot pre-reloc is higher than in SPL. */ -#if defined(CONFIG_SPL_STACK_R_ADDR) && CONFIG_SPL_STACK_R_ADDR -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK_R_ADDR -#else -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK -#endif #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* * U-Boot general configurations */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ /* Print buffer size */ -#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - /* Boot argument buffer size */ /* * Cache @@ -122,23 +101,12 @@ * NAND Support */ #ifdef CONFIG_NAND_DENALI -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_ONFI_DETECTION #define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NANDREGS_ADDRESS #define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS #endif /* - * QSPI support - */ -/* QSPI reference clock */ -#ifndef __ASSEMBLY__ -unsigned int cm_get_qspi_controller_clk_hz(void); -#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() -#endif - -/* * USB */ @@ -146,7 +114,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * USB Gadget (DFU, UMS) */ #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) -#define CONFIG_SYS_DFU_DATA_BUF_SIZE (16 * 1024 * 1024) #define DFU_DEFAULT_POLL_TIMEOUT 300 /* USB IDs */ @@ -159,9 +126,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); */ /* Environment for SDMMC boot */ -#if defined(CONFIG_ENV_IS_IN_MMC) -#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ -#endif /* Environment for QSPI boot */ @@ -183,32 +147,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * 0xFFEz_zzzz ...... Malloc area (grows up to top) * 0xFFE3_FFFF ...... End of SRAM (top) */ -#ifndef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE -#endif - -/* SPL SDMMC boot support */ -#ifdef CONFIG_SPL_MMC_SUPPORT -#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#endif -#else -#ifndef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1 -#endif -#endif /* SPL QSPI boot support */ /* SPL NAND boot support */ -#ifdef CONFIG_SPL_NAND_SUPPORT -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x100000 -#endif -#endif /* Extra Environment */ #ifndef CONFIG_SPL_BUILD