X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsocfpga_arria5_secu1.h;h=9ce5fa62d560cacbe0d5462dfff1a1e17b56ee88;hb=64cfeda8ae2e95751c5d2dfa4dc4a906478ae2f6;hp=2271f26a6b349dd72eae94339cca220be1c829b9;hpb=f1c0b7cd4be2081ae3711cec2c4cc2910a5817e1;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 2271f26..9ce5fa6 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2017-2020 ABB + * Copyright (C) 2017-2020 Hitachi Power Grids * */ #ifndef __CONFIG_SOCFPGA_SECU1_H__ @@ -9,9 +9,6 @@ #include #include -/* Call misc_init_r */ -#define CONFIG_MISC_INIT_R - #define CONFIG_HUSH_INIT_VAR /* Eternal oscillator */ #define CONFIG_SYS_TIMER_RATE 40000000 @@ -30,20 +27,6 @@ /* Booting Linux */ #define CONFIG_BOOTFILE "zImage" -#define CONFIG_BOOTCOMMAND \ - "setenv bootcmd '" \ - "bridge enable; " \ - "if test ${bootnum} = \"b\"; " \ - "then run _fpga_loadsafe; " \ - "else if test ${bootcount} -eq 4; then echo \"Switching copy...\"; setexpr x $bootnum % 2 && setexpr bootnum $x + 1; saveenv; fi; " \ - "run _fpga_loaduser; " \ - "fi;" \ - "echo \"Booting bank $bootnum\" && run userload && run userboot;" \ - "' && " \ - "setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && " \ - "saveenv && saveenv && boot;" - -#define CONFIG_CMDLINE_TAG #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Environment settings */ @@ -57,9 +40,6 @@ #define CONFIG_BOOT_RETRY_TIME 45 #define CONFIG_RESET_TO_RETRY -#define CONFIG_LOADADDR 0x01000000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_KM_KERNEL_ADDR - /* * FPGA Remote Update related environment * @@ -115,11 +95,6 @@ /* The rest of the configuration is shared */ #include -#ifdef CONFIG_SPL_NAND_SUPPORT -#undef CONFIG_SYS_NAND_U_BOOT_OFFS -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -#endif - #undef CONFIG_WATCHDOG_TIMEOUT_MSECS #define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000