X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsocfpga_arria10_socdk.h;h=645e66e6b09fa53b11e453cf5f642d309c3fa7ea;hb=e4b91f085d4259f187052ff724c80af38fc11b18;hp=83718dd2c9cb9864e77079a859f7bc8890acc2f8;hpb=390194d43fa4478ddb638164ddb114c979f3e57a;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h
index 83718dd..645e66e 100644
--- a/include/configs/socfpga_arria10_socdk.h
+++ b/include/configs/socfpga_arria10_socdk.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
- *  Copyright (C) 2015-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier:	GPL-2.0
+ *  Copyright (C) 2015-2019 Altera Corporation <www.altera.com>
  */
 
 #ifndef __CONFIG_SOCFGPA_ARRIA10_H__
@@ -9,8 +8,6 @@
 
 #include <asm/arch/base_addr_a10.h>
 
-#define CONFIG_HW_WATCHDOG
-
 /* Booting Linux */
 #define CONFIG_LOADADDR		0x01000000
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
@@ -18,18 +15,10 @@
 /*
  * U-Boot general configurations
  */
-/* Cache options */
-#define CONFIG_SYS_DCACHE_OFF
 
 /* Memory configurations  */
 #define PHYS_SDRAM_1_SIZE		0x40000000
 
-/* Ethernet on SoC (EMAC) */
-
-/*
- * U-Boot environment configurations
- */
-
 /*
  * Serial / UART configurations
  */
@@ -47,6 +36,9 @@
  */
 #define CONFIG_SYS_MAX_FLASH_BANKS     1
 
+/* SPL memory allocation configuration, this is for FAT implementation */
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00015000
+
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>