X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsmdk6400.h;h=d4dc8ef82de9c982d55252370d234f9371957ee0;hb=d193c1b6eb05041c94ad9aacd8c94189d1dbc5f8;hp=c61667fd0c190a0876f5896064ac4eacffcbe75d;hpb=ee924e00300bd1136589b2d5f8ad1f008df01bd4;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index c61667f..d4dc8ef 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -2,7 +2,7 @@ * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Marius Groeger - * Gary Jennejohn + * Gary Jennejohn * David Mueller * * (C) Copyright 2008 @@ -40,17 +40,24 @@ #define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */ #define CONFIG_SMDK6400 1 /* on a SAMSUNG SMDK6400 Board */ +#define CONFIG_PERIPORT_REMAP +#define CONFIG_PERIPORT_BASE 0x70000000 +#define CONFIG_PERIPORT_SIZE 0x13 + +#define CONFIG_SYS_IRAM_BASE 0x0c000000 /* Internal SRAM base address */ +#define CONFIG_SYS_IRAM_SIZE 0x2000 /* 8 KB of internal SRAM memory */ +#define CONFIG_SYS_IRAM_END (CONFIG_SYS_IRAM_BASE + CONFIG_SYS_IRAM_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_IRAM_END - GENERATED_GBL_DATA_SIZE) + #define CONFIG_SYS_SDRAM_BASE 0x50000000 /* input clock of PLL: SMDK6400 has 12MHz input clock */ #define CONFIG_SYS_CLK_FREQ 12000000 -#if !defined(CONFIG_NAND_SPL) && (TEXT_BASE >= 0xc0000000) +#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) #define CONFIG_ENABLE_MMU #endif -#define CONFIG_MEMORY_UPPER_CODE - #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG @@ -58,25 +65,22 @@ /* * Architecture magic and machine type */ -#define MACH_TYPE 1270 +#define CONFIG_MACH_TYPE 1270 #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#undef CONFIG_SKIP_RELOCATE_UBOOT - /* * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes for initial data */ /* * Hardware drivers */ -#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ -#define CS8900_BASE 0x18800300 -#define CS8900_BUS16 1 /* follow the Linux driver */ +#define CONFIG_CS8900 /* we have a CS8900 on-board */ +#define CONFIG_CS8900_BASE 0x18800300 +#define CONFIG_CS8900_BUS16 /* follow the Linux driver */ /* * select serial console configuration @@ -84,9 +88,6 @@ #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK6400 */ #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#endif #define CONFIG_CMDLINE_EDITING @@ -104,7 +105,7 @@ #define CONFIG_CMD_REGINFO #define CONFIG_CMD_LOADS #define CONFIG_CMD_LOADB -#define CONFIG_CMD_ENV +#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_NAND #if defined(CONFIG_BOOT_ONENAND) #define CONFIG_CMD_ONENAND @@ -140,16 +141,6 @@ #define CONFIG_SYS_HZ 1000 -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE 0x40000 /* regular stack 256KB */ - /********************************** Support Clock Settings ********************************** @@ -209,6 +200,9 @@ /* total memory available to uboot */ #define CONFIG_SYS_UBOOT_SIZE (1024 * 1024) +/* Put environment copies after the end of U-Boot owned RAM */ +#define CONFIG_NAND_ENV_DST (CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE) + #ifdef CONFIG_ENABLE_MMU #define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 #define CONFIG_BOOTCOMMAND "nand read 0xc0018000 0x60000 0x1c0000;" \ @@ -255,12 +249,8 @@ #define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE /* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */ #define CONFIG_SYS_NAND_ECCBYTES 4 -/* Number of ECC-blocks per NAND page */ -#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE) /* Size of a single OOB region */ #define CONFIG_SYS_NAND_OOBSIZE 64 -/* Number of ECC bytes per page */ -#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS) /* ECC byte positions */ #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \ 48, 49, 50, 51, 52, 53, 54, 55, \ @@ -288,6 +278,7 @@ #if !defined(CONFIG_ENABLE_MMU) #define CONFIG_CMD_USB 1 +#define CONFIG_USB_S3C64XX #define CONFIG_USB_OHCI_NEW 1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x74300000 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c6400"