X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsmartweb.h;h=7c8f1676be26a82e6ddff808006e48ea3741fc7e;hb=aec118ebe63f7f0ab60916f9906fb3cb680abf7a;hp=da6fb18c17ad35e7d34e08fb71b7e0090ea90ec4;hpb=5d7dea14007bc41b8984a7881bf1686d7030f644;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index da6fb18..7c8f167 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -30,7 +30,7 @@ #include /* - * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot + * Warning: changing CONFIG_TEXT_BASE requires adapting the initial boot * program. Since the linker has to swallow that define, we must use a pure * hex number here! */ @@ -41,9 +41,6 @@ /* misc settings */ -/* setting board specific options */ -#define CONFIG_SYS_AUTOLOAD "yes" - /* * SDRAM: 1 bank, 64 MB, base address 0x20000000 * Already initialized before u-boot gets started. @@ -57,27 +54,16 @@ */ /* NAND flash settings */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 +#define CFG_SYS_NAND_BASE ATMEL_BASE_CS3 +#define CFG_SYS_NAND_MASK_ALE (1 << 21) +#define CFG_SYS_NAND_MASK_CLE (1 << 22) +#define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CFG_SYS_NAND_READY_PIN AT91_PIN_PC13 /* serial console */ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS -/* USB configuration */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_ATMEL_CLK_SEL_PLLB -#define CONFIG_USB_OHCI_NEW -#define CONFIG_SYS_USB_OHCI_CPU_INIT -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 - /* USB DFU support */ #define CONFIG_USB_GADGET_AT91 @@ -95,7 +81,6 @@ \ "basicargs=console=ttyS0,115200\0" \ \ - "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" /* * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, @@ -107,15 +92,13 @@ /* Defines for SPL */ -#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) -#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_SIZE SZ_512K +#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE -#define CONFIG_SYS_NAND_SIZE (SZ_256M) -#define CONFIG_SYS_NAND_ECCSIZE 256 -#define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ +#define CFG_SYS_NAND_ECCSIZE 256 +#define CFG_SYS_NAND_ECCBYTES 3 +#define CFG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, }