X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsiemens-am33x-common.h;h=d2d4296eed6232dc32a4f807a3c55d88ecdd8c73;hb=bf2c48fa1a6e068f232d84aae43b5dad654a9017;hp=bfadf4a6b861ca71d43992f2092a8ca02ff06e45;hpb=4de720e98d552dfda9278516bf788c4a73b3e56f;p=platform%2Fkernel%2Fu-boot.git

diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index bfadf4a..d2d4296 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -15,29 +15,15 @@
 
 #include <asm/arch/omap.h>
 
-#define CONFIG_DMA_COHERENT
-#define CONFIG_DMA_COHERENT_SIZE	(1 << 20)
-
 /* commands to include */
 
-#ifndef CONFIG_SPL_BUILD
 #define CONFIG_ROOTPATH		"/opt/eldk"
-#endif
-
-#define CONFIG_SYS_AUTOLOAD	"yes"
 
 /* Clock Defines */
 #define V_OSCK				24000000  /* Clock output from T2 */
 #define V_SCLK				(V_OSCK)
 
-/* We set the max number of command args high to avoid HUSH bugs. */
-#define CONFIG_SYS_MAXARGS		32
-
 /* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE		1024
-
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 
 /*
  * memtest works on 8 MB in DRAM after skipping 32MB from
@@ -48,11 +34,8 @@
 #define PHYS_DRAM_1			0x80000000	/* DRAM Bank #1 */
 
 #define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
-						GENERATED_GBL_DATA_SIZE)
  /* Platform/Board specific defs */
 #define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
-#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
 
 /* NS16550 Configuration */
 #define CONFIG_SYS_NS16550_SERIAL
@@ -64,13 +47,6 @@
 /* I2C Configuration */
 
 /* Defines for SPL */
-#define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
-					 CONFIG_SPL_TEXT_BASE)
-
-#define CONFIG_SPL_BSS_START_ADDR	0x80000000
-#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
-
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME	"u-boot.img"
 
 #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 					 10, 11, 12, 13, 14, 15, 16, 17, \
@@ -95,24 +71,18 @@
  * header. That is 0x800FFFC0--0x80100000 should not be used for any
  * other needs.
  */
-#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
 
 /*
  * Since SPL did pll and ddr initialization for us,
  * we don't need to do it twice.
  */
 
-#ifndef CONFIG_SPL_BUILD
-
 /* USB DRACO ID as default */
 #define CONFIG_USBD_HS
 
 /* USB Device Firmware Update support */
 #define DFU_MANIFEST_POLL_TIMEOUT	25000
 
-#endif /* CONFIG_SPL_BUILD */
-
 /*
  * Default to using SPI for environment, etc.  We have multiple copies
  * of SPL as the ROM will check these locations.
@@ -240,7 +210,7 @@
 	"nand_active_ubi_vol=rootfs_a\0" \
 	"nand_active_ubi_vol_A=rootfs_a\0" \
 	"nand_active_ubi_vol_B=rootfs_b\0" \
-	"nand_root_fs_type=ubifs rootwait=1\0" \
+	"nand_root_fs_type=ubifs rootwait\0" \
 	"nand_src_addr=0x280000\0" \
 	"nand_src_addr_A=0x280000\0" \
 	"nand_src_addr_B=0x780000\0" \
@@ -317,7 +287,7 @@
 	"nand_active_ubi_vol=rootfs_a\0" \
 	"rootfs_name=rootfs\0" \
 	"kernel_name=uImage\0"\
-	"nand_root_fs_type=ubifs rootwait=1\0" \
+	"nand_root_fs_type=ubifs rootwait\0" \
 	"nand_args=run bootargs_defaults;" \
 		"mtdparts default;" \
 		"setenv ${partitionset_active} true;" \