X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsh7785lcr.h;h=6cb0ef3389e022cd95325318e816ccb270608e6b;hb=0223462b373b975d970fa86e5e1a7eadd1d41820;hp=2723eaf2d3d9f50624930e2ca0a16cc4906401f6;hpb=8401bfa91ef57e331e2a3abdf768d41803bec88e;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 2723eaf..6cb0ef3 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -1,50 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Configuation settings for the Renesas Technology R0P7785LC0011RL board * * Copyright (C) 2008 Yoshihiro Shimoda - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __SH7785LCR_H #define __SH7785LCR_H -#undef DEBUG #define CONFIG_CPU_SH7785 1 -#define CONFIG_SH7785LCR 1 - -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_PCI -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING -#define CONFIG_CMD_NFS -#define CONFIG_CMD_SDRAM -#define CONFIG_CMD_RUN -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_SH_ZIMAGEBOOT - -#define CONFIG_CMD_USB -#define CONFIG_USB_STORAGE -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_DOS_PARTITION -#define CONFIG_MAC_PARTITION - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "console=ttySC1,115200 root=/dev/nfs ip=dhcp" #define CONFIG_EXTRA_ENV_SETTINGS \ "bootdevice=0:1\0" \ "usbload=usb reset;usbboot;usb stop;bootm\0" -#define CONFIG_VERSION_VARIABLE +#define CONFIG_DISPLAY_BOARDINFO #undef CONFIG_SHOW_BOOT_PROGRESS /* MEMORY */ #if defined(CONFIG_SH_32BIT) -#define CONFIG_SYS_TEXT_BASE 0x8FF80000 /* 0x40000000 - 0x47FFFFFF does not use */ #define CONFIG_SH_SDRAM_OFFSET (0x8000000) #define SH7785LCR_SDRAM_PHYS_BASE (0x40000000 + CONFIG_SH_SDRAM_OFFSET) @@ -54,7 +28,6 @@ #define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024) #define SH7785LCR_USB_BASE (0xa6000000) #else -#define CONFIG_SYS_TEXT_BASE 0x0FF80000 #define SH7785LCR_SDRAM_BASE (0x08000000) #define SH7785LCR_SDRAM_SIZE (128 * 1024 * 1024) #define SH7785LCR_FLASH_BASE_1 (0xa0000000) @@ -62,27 +35,17 @@ #define SH7785LCR_USB_BASE (0xb4000000) #endif -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_PBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE 512 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* SCIF */ -#define CONFIG_SCIF_CONSOLE 1 #define CONFIG_CONS_SCIF1 1 #define CONFIG_SCIF_EXT_CLOCK 1 -#undef CONFIG_SYS_CONSOLE_INFO_QUIET -#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE -#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE - #define CONFIG_SYS_MEMTEST_START (SH7785LCR_SDRAM_BASE) #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ (SH7785LCR_SDRAM_SIZE) - \ 4 * 1024 * 1024) -#undef CONFIG_SYS_ALT_MEMTEST #undef CONFIG_SYS_MEMTEST_SCRATCH #undef CONFIG_SYS_LOADS_BAUD_CHANGE @@ -123,7 +86,6 @@ #define CONFIG_R8A66597_ENDIAN 0x0000 /* little */ /* PCI Controller */ -#define CONFIG_PCI #define CONFIG_SH4_PCI #define CONFIG_SH7780_PCI #if defined(CONFIG_SH_32BIT) @@ -135,7 +97,6 @@ #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE #endif -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ @@ -154,11 +115,7 @@ #define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE -/* Network device (RTL8169) support */ -#define CONFIG_RTL8169 - /* ENV setting */ -#define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_OVERWRITE 1 #define CONFIG_ENV_SECT_SIZE (256 * 1024) #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) @@ -169,8 +126,6 @@ /* Board Clock */ /* The SCIF used external clock. system clock only used timer. */ #define CONFIG_SYS_CLK_FREQ 50000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __SH7785LCR_H */