X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsh7785lcr.h;h=2723eaf2d3d9f50624930e2ca0a16cc4906401f6;hb=f76eba38b3eda905ff3bdc18dd1240d3dcbc6e5a;hp=94c8d6b790c02c78f4f757834f2ecba22bf5fe4c;hpb=06b18163b57e6b0349b0c299222d50e7b1e41e50;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 94c8d6b..2723eaf 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -3,31 +3,13 @@ * * Copyright (C) 2008 Yoshihiro Shimoda * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __SH7785LCR_H #define __SH7785LCR_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7785 1 #define CONFIG_SH7785LCR 1 @@ -37,10 +19,10 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_NFS -#define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM #define CONFIG_CMD_RUN #define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_SH_ZIMAGEBOOT #define CONFIG_CMD_USB #define CONFIG_USB_STORAGE @@ -61,14 +43,26 @@ #undef CONFIG_SHOW_BOOT_PROGRESS /* MEMORY */ +#if defined(CONFIG_SH_32BIT) +#define CONFIG_SYS_TEXT_BASE 0x8FF80000 +/* 0x40000000 - 0x47FFFFFF does not use */ +#define CONFIG_SH_SDRAM_OFFSET (0x8000000) +#define SH7785LCR_SDRAM_PHYS_BASE (0x40000000 + CONFIG_SH_SDRAM_OFFSET) +#define SH7785LCR_SDRAM_BASE (0x80000000 + CONFIG_SH_SDRAM_OFFSET) +#define SH7785LCR_SDRAM_SIZE (384 * 1024 * 1024) +#define SH7785LCR_FLASH_BASE_1 (0xa0000000) +#define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024) +#define SH7785LCR_USB_BASE (0xa6000000) +#else +#define CONFIG_SYS_TEXT_BASE 0x0FF80000 #define SH7785LCR_SDRAM_BASE (0x08000000) #define SH7785LCR_SDRAM_SIZE (128 * 1024 * 1024) #define SH7785LCR_FLASH_BASE_1 (0xa0000000) #define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024) #define SH7785LCR_USB_BASE (0xb4000000) +#endif #define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_PROMPT "=> " #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_PBSIZE 256 #define CONFIG_SYS_MAXARGS 16 @@ -99,7 +93,6 @@ #define CONFIG_SYS_MONITOR_BASE (SH7785LCR_FLASH_BASE_1) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MALLOC_LEN (512 * 1024) -#define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ @@ -133,9 +126,15 @@ #define CONFIG_PCI #define CONFIG_SH4_PCI #define CONFIG_SH7780_PCI +#if defined(CONFIG_SH_32BIT) +#define CONFIG_SH7780_PCI_LSR 0x1ff00001 +#define CONFIG_SH7780_PCI_LAR 0x5f000000 +#define CONFIG_SH7780_PCI_BAR 0x5f000000 +#else #define CONFIG_SH7780_PCI_LSR 0x07f00001 #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE +#endif #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 @@ -147,12 +146,15 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ -#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE +#if defined(CONFIG_SH_32BIT) +#define CONFIG_PCI_SYS_PHYS SH7785LCR_SDRAM_PHYS_BASE +#else #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE +#endif +#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE /* Network device (RTL8169) support */ -#define CONFIG_NET_MULTI #define CONFIG_RTL8169 /* ENV setting */ @@ -167,7 +169,8 @@ /* Board Clock */ /* The SCIF used external clock. system clock only used timer. */ #define CONFIG_SYS_CLK_FREQ 50000000 -#define TMU_CLK_DIVIDER 4 -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) +#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __SH7785LCR_H */