X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsh7752evb.h;h=1f29e3d221e8ba04f2817a53cfbe6ba5b84acae7;hb=d01806a8fcbdaedcc67cead56ece572021d97ab7;hp=39e8244b2524bc6ddbff8dbb5ed22a27bf7974d7;hpb=fe84c48eeb8e9cb0b8b80a4c0a53bb089adff9af;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index 39e8244..1f29e3d 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -1,37 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * Configuation settings for the sh7752evb board * * Copyright (C) 2012 Renesas Solutions Corp. - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __SH7752EVB_H #define __SH7752EVB_H #define CONFIG_CPU_SH7752 1 -#define CONFIG_SH7752EVB 1 - -#define CONFIG_SYS_TEXT_BASE 0x5ff80000 - -#define CONFIG_CMD_SDRAM - -#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp" #define CONFIG_DISPLAY_BOARDINFO #undef CONFIG_SHOW_BOOT_PROGRESS -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* MEMORY */ #define SH7752EVB_SDRAM_BASE (0x40000000) #define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024) -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_PBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE 512 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* SCIF */ @@ -40,7 +26,6 @@ #define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE) #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 480 * 1024 * 1024) -#undef CONFIG_SYS_ALT_MEMTEST #undef CONFIG_SYS_MEMTEST_SCRATCH #undef CONFIG_SYS_LOADS_BAUD_CHANGE @@ -55,12 +40,10 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* Ether */ -#define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 18 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 #define CONFIG_SH_ETHER_USE_GETHER 1 -#define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII @@ -73,11 +56,9 @@ #define SH7752EVB_ETHERNET_NUM_CH 2 /* SPI */ -#define CONFIG_SH_SPI 1 #define CONFIG_SH_SPI_BASE 0xfe002000 /* MMCIF */ -#define CONFIG_SH_MMCIF 1 #define CONFIG_SH_MMCIF_ADDR 0xffcb0000 #define CONFIG_SH_MMCIF_CLK 48000000 @@ -94,7 +75,5 @@ /* Board Clock */ #define CONFIG_SYS_CLK_FREQ 48000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #endif /* __SH7752EVB_H */