X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsequoia.h;h=169778fa9244009a8fcffce238d68eded7b34a59;hb=b0cf733933c3bc1b4ab353e16affabc60f863db5;hp=0e21ee3dc087eb784878f58fdad1513314748b60;hpb=17998eff9021b7b579c0387e934d8c52603fe247;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 0e21ee3..169778f 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -45,7 +45,6 @@ * Define this if you want support for video console with radeon 9200 pci card * Also set CONFIG_SYS_TEXT_BASE to 0xFFF80000 in board/amcc/sequoia/config.mk in this case */ -#undef CONFIG_VIDEO #ifdef CONFIG_VIDEO /* @@ -55,7 +54,6 @@ #define CONFIG_4xx_DCACHE /* enable dcache */ #endif -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ /* @@ -97,21 +95,9 @@ /* * Environment */ -#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) -#define CONFIG_ENV_IS_IN_NAND /* use NAND for environ vars */ -#define CONFIG_ENV_IS_EMBEDDED /* use embedded environment */ -#elif defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_SYS_RAMBOOT) #define CONFIG_ENV_IS_NOWHERE /* Store env in memory only */ #define CONFIG_ENV_SIZE (8 << 10) -/* - * In RAM-booting version, we have no environment storage. So we need to - * provide at least preliminary MAC addresses for the 4xx EMAC driver to - * register the interfaces. Those two addresses are generated via the - * tools/gen_eth_addr tool and should only be used in a closed laboratory - * environment. - */ -#define CONFIG_ETHADDR 4a:56:49:22:3e:43 -#define CONFIG_ETH1ADDR 02:93:53:d5:06:98 #else #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environ vars */ #endif @@ -136,6 +122,7 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ +#endif /* CONFIG_CMD_FLASH */ #ifdef CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */ @@ -146,70 +133,12 @@ #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) #endif -#endif /* CONFIG_CMD_FLASH */ - -/* - * IPL (Initial Program Loader, integrated inside CPU) - * Will load first 4k from NAND (SPL) into cache and execute it from there. - * - * SPL (Secondary Program Loader) - * Will load special U-Boot version (NUB) from NAND and execute it. This SPL - * has to fit into 4kByte. It sets up the CPU and configures the SDRAM - * controller and the NAND controller so that the special U-Boot image can be - * loaded from NAND to SDRAM. - * - * NUB (NAND U-Boot) - * This NAND U-Boot (NUB) is a special U-Boot version which can be started - * from RAM. Therefore it mustn't (re-)configure the SDRAM controller. - * - * On 440EPx the SPL is copied to SDRAM before the NAND controller is - * set up. While still running from cache, I experienced problems accessing - * the NAND controller. sr - 2006-08-25 - */ -#define CONFIG_SYS_NAND_BOOT_SPL_SRC 0xfffff000 /* SPL location */ -#define CONFIG_SYS_NAND_BOOT_SPL_SIZE (4 << 10) /* SPL size */ -#define CONFIG_SYS_NAND_BOOT_SPL_DST (CONFIG_SYS_OCM_BASE + (12 << 10)) /* Copy SPL here */ -#define CONFIG_SYS_NAND_U_BOOT_DST 0x01000000 /* Load NUB to this addr */ -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST /* Start NUB from */ - /* this addr */ -#define CONFIG_SYS_NAND_BOOT_SPL_DELTA (CONFIG_SYS_NAND_BOOT_SPL_SRC - CONFIG_SYS_NAND_BOOT_SPL_DST) - -/* - * Define the partitioning of the NAND chip (only RAM U-Boot is needed here) - */ -#define CONFIG_SYS_NAND_U_BOOT_OFFS (16 << 10) /* Offset to RAM U-Boot image */ -#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10) /* Size of RAM U-Boot image */ - -/* - * Now the NAND chip has to be defined (no autodetection used!) - */ -#define CONFIG_SYS_NAND_PAGE_SIZE 512 /* NAND chip page size */ -#define CONFIG_SYS_NAND_BLOCK_SIZE (16 << 10) /* NAND chip block size */ -#define CONFIG_SYS_NAND_PAGE_COUNT 32 /* NAND chip page count */ -#define CONFIG_SYS_NAND_BAD_BLOCK_POS 5 /* Location of bad block marker */ -#undef CONFIG_SYS_NAND_4_ADDR_CYCLE /* No fourth addr used (<=32MB) */ - -#define CONFIG_SYS_NAND_ECCSIZE 256 -#define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_OOBSIZE 16 -#define CONFIG_SYS_NAND_ECCPOS {0, 1, 2, 3, 6, 7} - -#ifdef CONFIG_ENV_IS_IN_NAND -/* - * For NAND booting the environment is embedded in the U-Boot image. Please take - * look at the file board/amcc/sequoia/u-boot-nand.lds for details. - */ -#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_ENV_SIZE) -#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) -#endif /* * DDR SDRAM */ #define CONFIG_SYS_MBYTES_SDRAM (256) /* 256MB */ -#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \ - !defined(CONFIG_SYS_RAMBOOT) +#if !defined(CONFIG_SYS_RAMBOOT) #define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */ #endif #define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ @@ -220,7 +149,6 @@ */ #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 -#define CONFIG_SYS_I2C_MULTI_EEPROMS #define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1) #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 @@ -247,7 +175,6 @@ CONFIG_AMCC_DEF_ENV_POWERPC \ CONFIG_AMCC_DEF_ENV_PPC_OLD \ CONFIG_AMCC_DEF_ENV_NOR_UPD \ - CONFIG_AMCC_DEF_ENV_NAND_UPD \ "kernel_addr=FC000000\0" \ "ramdisk_addr=FC180000\0" \ "" @@ -285,15 +212,12 @@ #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 #endif -#define CONFIG_USB_STORAGE /* Comment this out to enable USB 1.1 device */ #define USB_2_0_DEVICE #endif /* CONFIG_440EPX */ /* Partitions */ -#define CONFIG_MAC_PARTITION -#define CONFIG_DOS_PARTITION #define CONFIG_ISO_PARTITION /* @@ -301,13 +225,11 @@ */ #define CONFIG_CMD_CHIP_CONFIG #define CONFIG_CMD_DTT -#define CONFIG_CMD_FAT #define CONFIG_CMD_NAND #define CONFIG_CMD_PCI #define CONFIG_CMD_SDRAM #ifdef CONFIG_440EPX -#define CONFIG_CMD_USB #endif #ifndef CONFIG_RAINIER @@ -321,7 +243,7 @@ * overwrite part of the U-Boot image which is already loaded from NAND * to SDRAM. */ -#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_SYS_RAMBOOT) #define CONFIG_SYS_POST_MEMORY_ON 0 #else #define CONFIG_SYS_POST_MEMORY_ON CONFIG_SYS_POST_MEMORY @@ -340,17 +262,13 @@ #define CONFIG_LOGBUFFER #define CONFIG_SYS_POST_CACHE_ADDR 0x7fff0000 /* free virtual address */ -#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ - #define CONFIG_SUPPORT_VFAT /* * PCI stuff */ /* General PCI */ -#define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 0 /* to avoid problems with PNP */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to */ @@ -370,8 +288,7 @@ /* * On Sequoia CS0 and CS3 are switched when configuring for NAND booting */ -#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) && \ - !defined(CONFIG_SYS_RAMBOOT) +#if !defined(CONFIG_SYS_RAMBOOT) #define CONFIG_SYS_NAND_CS 3 /* NAND chip connected to CSx */ /* Memory Bank 0 (NOR-FLASH) initialization */ #define CONFIG_SYS_EBC_PB0AP 0x03017200 @@ -486,11 +403,8 @@ #define CONFIG_ATI_RADEON_FB /* use radeon framebuffer driver */ #define VIDEO_IO_OFFSET 0xe8000000 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET -#define CONFIG_VIDEO_SW_CURSOR #define CONFIG_VIDEO_LOGO -#define CONFIG_CFB_CONSOLE #define CONFIG_SPLASH_SCREEN -#define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_CMD_BMP #endif