X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fsama5d3xek.h;h=44c1952b51e710001d1b004d3aaf6c5f1ee5bcc8;hb=19ea606109135c3d9892d86e1b1c2a8fb551cc1b;hp=82e1a16a4099ea1cb93359776ac25e7637dc7368;hpb=f0306a145b3234ae4bd3b46f2567b6f1ad7b8f4f;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 82e1a16..44c1952 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -30,16 +30,12 @@ /* NOR flash */ #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_FLASH_BASE 0x10000000 #define CONFIG_SYS_MAX_FLASH_SECT 131 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #endif /* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 @@ -52,10 +48,6 @@ /* SerialFlash */ -#ifdef CONFIG_CMD_SF -#define CONFIG_SF_DEFAULT_SPEED 30000000 -#endif - /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 @@ -66,14 +58,8 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512 /* USB */ - #ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL_CLK_SEL_UPLL #define CONFIG_USB_OHCI_NEW @@ -86,7 +72,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x18000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 @@ -96,15 +81,7 @@ #define CONFIG_SYS_MONITOR_LEN (512 << 10) #ifdef CONFIG_SD_BOOT -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" - -#elif CONFIG_SPI_BOOT -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000 - -#elif CONFIG_NAND_BOOT -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_BASE #endif #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE @@ -113,6 +90,5 @@ #define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif