X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Frk3288_common.h;h=d95254b25da4c579543b26214a162dd0f5c0b466;hb=f113d7d3034672de7d074506a05a7055f1f0dcae;hp=ecf2675255120349ec166bbfd68ce3e4b3fb87b8;hpb=541f538f4ca50082f77f7f34f05950d57804b1cc;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index ecf2675..844c154 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -1,90 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2015 Google, Inc - * - * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_RK3288_COMMON_H #define __CONFIG_RK3288_COMMON_H -#include +#include #include "rockchip-common.h" -#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_MALLOC_LEN (32 << 20) -#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64MB */ -#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) -#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */ -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) +#define CONFIG_SYS_HZ_CLOCK 24000000 -#define CONFIG_SPL_FRAMEWORK -#define CONFIG_SYS_NS16550_MEM32 - -#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM -/* Bootrom will load u-boot binary to 0x0 once return from SPL */ -#define CONFIG_SYS_TEXT_BASE 0x00000000 -#else -#define CONFIG_SYS_TEXT_BASE 0x00100000 -#endif -#define CONFIG_SYS_INIT_SP_ADDR 0x00100000 -#define CONFIG_SYS_LOAD_ADDR 0x00800800 -#define CONFIG_SPL_STACK 0xff718000 -#define CONFIG_SPL_TEXT_BASE 0xff704004 - -/* MMC/SD IP block */ -#define CONFIG_BOUNCE_BUFFER +#define CONFIG_IRAM_BASE 0xff700000 /* RAW SD card / eMMC locations. */ -#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) - -/* FAT sd card locations. */ -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_NR_DRAM_BANKS 1 #define SDRAM_BANK_SIZE (2UL << 30) +#define SDRAM_MAX_SIZE 0xfe000000 -#define CONFIG_SPI_FLASH -#define CONFIG_SPI -#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SYS_MONITOR_LEN (600 * 1024) #ifndef CONFIG_SPL_BUILD -/* usb otg */ -#define CONFIG_USB_GADGET -#define CONFIG_USB_GADGET_DUALSPEED -#define CONFIG_USB_GADGET_DWC2_OTG -#define CONFIG_ROCKCHIP_USB2_PHY -#define CONFIG_USB_GADGET_VBUS_DRAW 0 - -/* fastboot */ -#define CONFIG_CMD_FASTBOOT -#define CONFIG_USB_FUNCTION_FASTBOOT -#define CONFIG_FASTBOOT_FLASH -#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 /* eMMC */ -#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_FASTBOOT_BUF_SIZE 0x08000000 -/* usb mass storage */ -#define CONFIG_USB_FUNCTION_MASS_STORAGE -#define CONFIG_CMD_USB_MASS_STORAGE - -#define CONFIG_USB_GADGET_DOWNLOAD -#define CONFIG_G_DNL_MANUFACTURER "Rockchip" -#define CONFIG_G_DNL_VENDOR_NUM 0x2207 -#define CONFIG_G_DNL_PRODUCT_NUM 0x320a - -/* usb host support */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2 -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_SMSC95XX -#define CONFIG_USB_ETHER_ASIX -#endif #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00000000\0" \ "pxefile_addr_r=0x00100000\0" \ @@ -99,12 +39,11 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x0fffffff\0" \ "initrd_high=0x0fffffff\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \ BOOTENV #endif -#define CONFIG_PREBOOT - #endif