X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fredwood.h;h=622b7c79e646aee6b72de00f6a414080d670fd25;hb=f76eba38b3eda905ff3bdc18dd1240d3dcbc6e5a;hp=32ed5746c564d3426531295b0a1a79fce7f84eea;hpb=d3c23a790fb24f9cb5cc467b81b0c3ad3eeb1f96;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/redwood.h b/include/configs/redwood.h index 32ed574..622b7c7 100644 --- a/include/configs/redwood.h +++ b/include/configs/redwood.h @@ -4,23 +4,7 @@ * (C) Copyright 2008 * Feng Kan, Applied Micro Circuits Corp., fkan@amcc.com * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_H #define __CONFIG_H @@ -28,11 +12,12 @@ /*----------------------------------------------------------------------- * High Level Configuration Options *----------------------------------------------------------------------*/ -#define CONFIG_4xx 1 /* ... PPC4xx family */ #define CONFIG_440 1 /* ... PPC460 family */ #define CONFIG_460SX 1 /* ... PPC460 family */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ +#define CONFIG_SYS_TEXT_BASE 0xfffb0000 + /*----------------------------------------------------------------------- * Include common defines/options for all AMCC boards *----------------------------------------------------------------------*/ @@ -46,49 +31,51 @@ * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) *----------------------------------------------------------------------*/ -#define CFG_FLASH_BASE 0xfff00000 /* start of FLASH */ -#define CFG_PERIPHERAL_BASE 0xa0000000 /* internal peripherals */ -#define CFG_ISRAM_BASE 0x90000000 /* internal SRAM */ +#define CONFIG_SYS_FLASH_BASE 0xfff00000 /* start of FLASH */ +#define CONFIG_SYS_ISRAM_BASE 0x90000000 /* internal SRAM */ -#define CFG_PCI_BASE 0xd0000000 /* internal PCI regs */ +#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ -#define CFG_PCIE_MEMBASE 0x90000000 /* mapped PCIe memory */ -#define CFG_PCIE0_MEMBASE 0x90000000 /* mapped PCIe memory */ -#define CFG_PCIE1_MEMBASE 0xa0000000 /* mapped PCIe memory */ -#define CFG_PCIE_MEMSIZE 0x01000000 +#define CONFIG_SYS_PCIE_MEMBASE 0x90000000 /* mapped PCIe memory */ +#define CONFIG_SYS_PCIE0_MEMBASE 0x90000000 /* mapped PCIe memory */ +#define CONFIG_SYS_PCIE1_MEMBASE 0xa0000000 /* mapped PCIe memory */ +#define CONFIG_SYS_PCIE_MEMSIZE 0x01000000 -#define CFG_PCIE0_XCFGBASE 0xb0000000 -#define CFG_PCIE1_XCFGBASE 0xb2000000 -#define CFG_PCIE2_XCFGBASE 0xb4000000 -#define CFG_PCIE0_CFGBASE 0xb6000000 -#define CFG_PCIE1_CFGBASE 0xb8000000 -#define CFG_PCIE2_CFGBASE 0xba000000 +#define CONFIG_SYS_PCIE0_XCFGBASE 0xb0000000 +#define CONFIG_SYS_PCIE1_XCFGBASE 0xb2000000 +#define CONFIG_SYS_PCIE2_XCFGBASE 0xb4000000 +#define CONFIG_SYS_PCIE0_CFGBASE 0xb6000000 +#define CONFIG_SYS_PCIE1_CFGBASE 0xb8000000 +#define CONFIG_SYS_PCIE2_CFGBASE 0xba000000 /* PCIe mapped UTL registers */ -#define CFG_PCIE0_REGBASE 0xd0000000 -#define CFG_PCIE1_REGBASE 0xd0010000 -#define CFG_PCIE2_REGBASE 0xd0020000 +#define CONFIG_SYS_PCIE0_REGBASE 0xd0000000 +#define CONFIG_SYS_PCIE1_REGBASE 0xd0010000 +#define CONFIG_SYS_PCIE2_REGBASE 0xd0020000 /* System RAM mapped to PCI space */ -#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE -#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE +#define CONFIG_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE #define CONFIG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024) -#define CFG_FPGA_BASE 0xe2000000 /* epld */ -#define CFG_OPER_FLASH 0xe7000000 /* SRAM - OPER Flash */ +#define CONFIG_SYS_FPGA_BASE 0xe2000000 /* epld */ +#define CONFIG_SYS_OPER_FLASH 0xe7000000 /* SRAM - OPER Flash */ + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 /* Use UART0 */ /*----------------------------------------------------------------------- * Initial RAM & stack pointer (placed in internal SRAM) *----------------------------------------------------------------------*/ -#define CFG_TEMP_STACK_OCM 1 -#define CFG_OCM_DATA_ADDR CFG_ISRAM_BASE -#define CFG_INIT_RAM_ADDR CFG_ISRAM_BASE /* Initial RAM address */ -#define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */ -#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CONFIG_SYS_TEMP_STACK_OCM 1 +#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */ -#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) -#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4) -#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) /*----------------------------------------------------------------------- * DDR SDRAM @@ -96,32 +83,32 @@ #define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */ #define CONFIG_DDR_ECC 1 /* with ECC support */ -#define CFG_SPD_MAX_DIMMS 2 +#define CONFIG_SYS_SPD_MAX_DIMMS 2 /* SPD i2c spd addresses */ #define SPD_EEPROM_ADDRESS {IIC0_DIMM0_ADDR, IIC0_DIMM1_ADDR} -#define IIC0_DIMM0_ADDR 0x53 -#define IIC0_DIMM1_ADDR 0x52 +#define IIC0_DIMM0_ADDR 0x53 +#define IIC0_DIMM1_ADDR 0x52 /*----------------------------------------------------------------------- * I2C *----------------------------------------------------------------------*/ -#define CFG_I2C_SPEED 400000 /* I2C speed */ +#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000 #define IIC0_BOOTPROM_ADDR 0x50 #define IIC0_ALT_BOOTPROM_ADDR 0x54 /* Don't probe these addrs */ -#define CFG_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54} +#define CONFIG_SYS_I2C_NOPROBES { {0, 0x50}, {0, 0x52}, {0, 0x53}, {0, 0x54} } -#define CFG_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ /*----------------------------------------------------------------------- * Environment *----------------------------------------------------------------------*/ -#undef CFG_ENV_IS_IN_NVRAM /* ... not in NVRAM */ -#define CFG_ENV_IS_IN_FLASH 1 /* Environment uses flash */ -#undef CFG_ENV_IS_IN_EEPROM /* ... not in EEPROM */ +#undef CONFIG_ENV_IS_IN_NVRAM /* ... not in NVRAM */ +#define CONFIG_ENV_IS_IN_FLASH 1 /* Environment uses flash */ +#undef CONFIG_ENV_IS_IN_EEPROM /* ... not in EEPROM */ #define CONFIG_PREBOOT "echo;" \ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ @@ -130,13 +117,12 @@ #undef CONFIG_BOOTARGS #define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_AMCC_DEF_ENV \ - CONFIG_AMCC_DEF_ENV_POWERPC \ - CONFIG_AMCC_DEF_ENV_NOR_UPD \ - CONFIG_AMCC_DEF_ENV_NAND_UPD \ - "kernel_addr=fc000000\0" \ - "fdt_addr=fc1e0000\0" \ - "ramdisk_addr=fc200000\0" \ + CONFIG_AMCC_DEF_ENV \ + CONFIG_AMCC_DEF_ENV_POWERPC \ + CONFIG_AMCC_DEF_ENV_NOR_UPD \ + "kernel_addr=fc000000\0" \ + "fdt_addr=fc1e0000\0" \ + "ramdisk_addr=fc200000\0" \ "" /*----------------------------------------------------------------------------+ @@ -149,7 +135,7 @@ #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ #define CONFIG_IBM_EMAC4_V4 1 -#define CONFIG_PHY_RESET 1 /* reset phy upon startup */ +#define CONFIG_PHY_RESET 1 /* reset phy upon startup */ #define CONFIG_PHY_RESET_DELAY 1000 #define CONFIG_M88E1141_PHY 1 /* Enable phy */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ @@ -164,22 +150,22 @@ /*----------------------------------------------------------------------- * FLASH related *----------------------------------------------------------------------*/ -#define CFG_FLASH_CFI /* The flash is CFI compatible */ -#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ -#define CFG_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ - -#define CFG_MAX_FLASH_BANKS 3 /* number of banks */ -#define CFG_MAX_FLASH_SECT 256 /* sectors per device */ - -#undef CFG_FLASH_CHECKSUM -#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ -#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ - -#ifdef CFG_ENV_IS_IN_FLASH -#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ -#define CFG_ENV_ADDR 0xfffa0000 -#define CFG_ENV_SIZE 0x10000 /* Size of Environment vars */ -#endif /* CFG_ENV_IS_IN_FLASH */ +#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ +#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ + +#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per device */ + +#undef CONFIG_SYS_FLASH_CHECKSUM +#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ + +#ifdef CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ +#define CONFIG_ENV_ADDR 0xfffa0000 +#define CONFIG_ENV_SIZE 0x10000 /* Size of Environment vars */ +#endif /* CONFIG_ENV_IS_IN_FLASH */ /*---------------------------------------------------------------------------*/