X-Git-Url: http://review.tizen.org/git/?a=blobdiff_plain;f=include%2Fconfigs%2Fr2dplus.h;h=36930fa3f1a735eb5e9d1c1326f42ba1cfd14785;hb=92832045c54586e9dffa082ff8cd8c2ef6040757;hp=4feaa0509aa7b5bd16f285ef886824b88d7330bd;hpb=2a728f3a1e3fd6f0483af822d5063766a3344ef2;p=platform%2Fkernel%2Fu-boot.git diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 4feaa05..36930fa 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -2,8 +2,6 @@ #define __CONFIG_H #define CONFIG_CPU_SH7751 1 -#define CONFIG_CPU_SH_TYPE_R 1 -#define CONFIG_R2DPLUS 1 #define __LITTLE_ENDIAN__ 1 #define CONFIG_DISPLAY_BOARDINFO @@ -11,52 +9,29 @@ /* SCIF */ #define CONFIG_CONS_SCIF1 1 -#define CONFIG_BOOTARGS "console=ttySC0,115200" -#define CONFIG_ENV_OVERWRITE 1 - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x8C000000 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_TEXT_BASE 0x8FE00000 -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_PBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE 512 - -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) /* Address of u-boot image in Flash */ #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_MONITOR_LEN (256 * 1024) -/* Size of DRAM reserved for malloc() use */ -#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* * NOR Flash ( Spantion S29GL256P ) */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_BASE (0xA0000000) #define CONFIG_SYS_MAX_FLASH_BANKS (1) #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#define CONFIG_ENV_SECT_SIZE 0x40000 -#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) - /* * SuperH Clock setting */ #define CONFIG_SYS_CLK_FREQ 60000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ -#define CONFIG_SYS_TMU_CLK_DIV 4 #define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ /* @@ -76,19 +51,6 @@ /* * SuperH PCI Bridge Configration */ -#define CONFIG_SH4_PCI #define CONFIG_SH7751_PCI -#define CONFIG_PCI_SCAN_SHOW 1 -#define __mem_pci - -#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ -#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS -#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ -#define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */ -#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS -#define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */ -#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE -#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE -#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE #endif /* __CONFIG_H */